參數(shù)資料
型號: SC16C2550IN40,112
廠商: NXP Semiconductors
文件頁數(shù): 43/46頁
文件大小: 0K
描述: IC UART DUAL W/FIFO 40-DIP
標準包裝: 9
特點: 2 通道
通道數(shù): 2,DUART
FIFO's: 16 字節(jié)
電源電壓: 2.5V,3.3V,5V
帶自動流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動位檢測功能:
帶調制解調器控制功能:
帶CMOS:
安裝類型: 通孔
封裝/外殼: 40-DIP(0.600",15.24mm)
供應商設備封裝: 40-DIP
包裝: 管件
其它名稱: 568-3262-5
935270024112
SC16C2550IN40
Philips Semiconductors
SC16C2550
Dual UART with 16 bytes of transmit and receive FIFOs and IrDA
encoder/decoder
Product data
Rev. 03 — 19 June 2003
6 of 46
9397 750 11621
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
5.2 Pin description
Fig 4.
LQFP48 pin conguration.
SC16C2550IB48
002aaa104
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
D4
D3
D2
D1
D0
TXRDYA
V
CC
RIA
CDA
DSRA
CTSA
N.C.
XTAL1
XTAL2
IOW
CDB
GND
RXRDYB
IOR
DSRB
RIB
RTSB
CTSB
N.C.
D5
D6
D7
RXB
RXA
TXRDYB
TXA
TXB
OP2B
CSA
CSB
N.C.
RESET
DTRB
DTRA
RTSA
OP2A
RXRDYA
INTA
INTB
A0
A1
A2
N.C.
Table 2:
Pin description
Symbol
Pin
Type Description
DIP40 PLCC44 LQFP48
A0
28
31
28
I
Address 0 select bit. Internal register address selection.
A1
27
30
27
I
Address 1 select bit. Internal register address selection.
A2
26
29
26
I
Address 2 select bit. Internal register address selection.
CSA, CSB 14, 15 16, 17
10, 11
I
Chip Select A, B (Active-LOW). This function is associated with individual
channels, A through B. These pins enable data transfers between the user
CPU and the SC16C2550 for the channel(s) addressed. Individual UART
sections (A, B) are addressed by providing a logic 0 on the respective CSA,
CSB pin.
D0-D7
1-8
2-9
44-48,
1-3
I/O
Data bus (bi-directional). These pins are the 8-bit, 3-State data bus for
transferring information to or from the controlling CPU. D0 is the least
signicant bit and the rst data bit in a transmit or receive serial data
stream.
GND
20
22
17
I
Signal and power ground.
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