參數(shù)資料
型號(hào): SC16C2550IN40,112
廠商: NXP Semiconductors
文件頁數(shù): 39/46頁
文件大?。?/td> 0K
描述: IC UART DUAL W/FIFO 40-DIP
標(biāo)準(zhǔn)包裝: 9
特點(diǎn): 2 通道
通道數(shù): 2,DUART
FIFO's: 16 字節(jié)
電源電壓: 2.5V,3.3V,5V
帶自動(dòng)流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動(dòng)位檢測(cè)功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 通孔
封裝/外殼: 40-DIP(0.600",15.24mm)
供應(yīng)商設(shè)備封裝: 40-DIP
包裝: 管件
其它名稱: 568-3262-5
935270024112
SC16C2550IN40
Philips Semiconductors
SC16C2550
Dual UART with 16 bytes of transmit and receive FIFOs and IrDA
encoder/decoder
Product data
Rev. 03 — 19 June 2003
44 of 46
9397 750 11621
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
12.4 Package related soldering information
[1]
For more detailed information on the BGA packages refer to the
(LF)BGA Application Note
(AN01026); order a copy from your Philips Semiconductors sales ofce.
[2]
All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the
maximum temperature (with respect to time) and body size of the package, there is a risk that internal
or external package cracks may occur due to vaporization of the moisture in them (the so called
popcorn effect). For details, refer to the Drypack information in the
Data Handbook IC26; Integrated
Circuit Packages; Section: Packing Methods.
[3]
For SDIP packages, the longitudinal axis must be parallel to the transport direction of the
printed-circuit board.
[4]
These transparent plastic packages are extremely sensitive to reow soldering conditions and must
on no account be processed through more than one soldering cycle or subjected to infrared reow
soldering with peak temperature exceeding 217
°C ± 10 °C measured in the atmosphere of the reow
oven. The package body peak temperature must be kept as low as possible.
[5]
These packages are not suitable for wave soldering. On versions with the heatsink on the bottom
side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with
the heatsink on the top side, the solder might be deposited on the heatsink surface.
[6]
If wave soldering is considered, then the package must be placed at a 45
° angle to the solder wave
direction. The package footprint must incorporate solder thieves downstream and at the side corners.
[7]
Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it
is denitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
[8]
Wave soldering is suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than
0.65 mm; it is denitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
13. Revision history
Table 27:
Suitability of IC packages for wave, reow and dipping soldering methods
Mounting
Package[1]
Soldering method
Wave
Reow[2]
Dipping
Through-hole
mount
DBS, DIP, HDIP, SDIP, SIL suitable[3]
suitable
Surface mount
BGA, LBGA, LFBGA,
SQFP, SSOP-T[4],
TFBGA, VFBGA
not suitable
suitable
DHVQFN, HBCC, HBGA,
HLQFP, HSQFP, HSOP,
HTQFP, HTSSOP,
HVQFN, HVSON, SMS
not suitable[5]
suitable
PLCC[6], SO, SOJ
suitable
LQFP, QFP, TQFP
not recommended[6][7]
suitable
SSOP, TSSOP, VSO,
VSSOP
not recommended[8]
suitable
Table 28:
Revision history
Rev Date
CPCN
Description
03
20030619
-
Product data (9397 750 11621). ECN 853-2368 30033 of 16 June 2003.
Modications:
added connection with resistor.
02
20030314
-
Product data (9397 750 11204). ECN 853-2368 29624 of 07 March 2003.
01
20020904
-
Product data (9397 750 08831). ECN 853-2368 28865 of 04 September 2002.
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