參數(shù)資料
型號(hào): SAK-C164SV-2RF
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP64
封裝: PLASTIC, TQFP-64
文件頁數(shù): 46/65頁
文件大?。?/td> 932K
代理商: SAK-C164SV-2RF
C164SV
Data Sheet
46
V1.0, 2003-04
Preliminary
P0.15-13 (P0H.7-5). Register RP0H can be loaded from the upper half of register
RSTCON under software control.
Table 11 associates the combinations of these three bits with the respective clock
generation mode.
Prescaler Operation
When prescaler operation is configured (CLKCFG = 001B) the CPU clock is derived from
the internal oscillator (input clock signal) by a 2:1 prescaler.
The frequency of
fCPU is half the frequency of fOSC and the high and low time of fCPU (i.e.
the duration of an individual TCL) is defined by the period of the input clock
fOSC.
The timings listed in the AC Characteristics that refer to TCLs therefore can be
calculated using the period of
fOSC for any TCL.
Phase Locked Loop
When PLL operation is configured (via CLKCFG) the on-chip phase locked loop is
enabled and provides the CPU clock (see Table 11). The PLL multiplies the input
frequency by the factor F which is selected via the combination of bits RP0H.7-5 (i.e.
fCPU = fOSC × F). With every F’th transition of fOSC the PLL circuit synchronizes the CPU
clock to the input clock. This synchronization is done smoothly, i.e. the CPU clock
frequency does not change abruptly.
Table 11
C164SV Clock Generation Modes
CLKCFG1)
(RP0H.7-5)
1) Please note that pin P0.15 (corresponding to RP0H.7) is inverted in emulation mode, and thus also in EHM.
CPU Frequency
fCPU = fOSC × F
External Clock
Input Range2)
2) The external clock input range refers to a CPU clock range of 10 … 25 MHz.
Notes
11 1
fOSC × 4
2.5 to 6.25 MHz
Default configuration
11 0
fOSC × 3
3.33 to 8.33 MHz
10 1
fOSC × 2
5 to 12.5 MHz
10 0
fOSC × 5
2 to 5 MHz
01 1
fOSC × 1
1 to 25 MHz
Direct drive3)
3) The maximum frequency depends on the duty cycle of the external clock signal.
01 0
fOSC × 1.5
6.66 to 16.66 MHz
00 1
fOSC / 2
2 to 50 MHz
CPU clock via prescaler
00 0
fOSC × 2.5
4 to 10 MHz
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