參數(shù)資料
型號(hào)： SAK-C164SV-2RF
廠商： INFINEON TECHNOLOGIES AG
元件分類： 微控制器/微處理器
英文描述： 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP64
封裝： PLASTIC, TQFP-64
文件頁數(shù)： 16/65頁
文件大小： 932K
代理商： SAK-C164SV-2RF
C164SV
Data Sheet
19
V1.0, 2003-04
Preliminary
The C164SV also provides an excellent mechanism to identify and to process
exceptions or error conditions that arise during run-time, so-called ‘Hardware Traps’.
Hardware traps cause immediate non-maskable system reaction which is similar to a
standard interrupt service (branching to a dedicated vector table location). The
occurrence of a hardware trap is additionally signified by an individual bit in the trap flag
register (TFR). Except when another higher prioritized trap service is in progress, a
hardware trap will interrupt any actual program execution. In turn, hardware trap services
can normally not be interrupted by standard or PEC interrupts.
Table 4 shows all of the possible exceptions or error conditions that can arise during run-
time:
Table 4
Hardware Trap Summary
Exception Condition
Trap
Flag
Trap
Vector
Location
Trap
Number
Trap
Priority
Reset Functions:
– Hardware Reset
– Software Reset
– W-dog Timer Overflow
–
RESET
00’0000H
00H
III
Class A Hardware Traps:
– Non-Maskable Interrupt
– Stack Overflow
– Stack Underflow
NMI
STKOF
STKUF
NMITRAP
STOTRAP
STUTRAP
00’0008H
00’0010H
00’0018H
02H
04H
06H
II
Class B Hardware Traps:
– Undefined Opcode
– Protected Instruction
Fault
– Illegal Word Operand
Access
– Illegal Instruction
Access
– Illegal External Bus
Access
UNDOPC
PRTFLT
ILLOPA
ILLINA
ILLBUS
BTRAP
00’0028H
0AH
I
Reserved
–
[2CH –
3CH]
[0BH –
0FH]
–
Software Traps
– TRAP Instruction
––
Any
[00’0000H –
00’01FCH]
in steps
of 4H
Any
[00H –
7FH]
Current
CPU
Priority
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