參數(shù)資料
型號(hào): SAH-XC2336A-72F80L
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQFP64
封裝: 0.50 MM PITCH, GREEN, PLASTIC, LQFP-64
文件頁數(shù): 27/106頁
文件大小: 1607K
代理商: SAH-XC2336A-72F80L
XC2336A
XC2000 Family / Base Line
Functional Description
Data Sheet
27
V2.1, 2011-07
3
Functional Description
The architecture of the XC233xA combines advantages of RISC, CISC, and DSP
processors with an advanced peripheral subsystem in a well-balanced design. On-chip
memory blocks allow the design of compact systems-on-silicon with maximum
performance suited for computing, control, and communication.
The on-chip memory blocks (program code memory and SRAM, dual-port RAM, data
SRAM) and the generic peripherals are connected to the CPU by separate high-speed
buses. Another bus, the LXBus, connects additional on-chip resources and external
resources (see Figure 4). This bus structure enhances overall system performance by
enabling the concurrent operation of several subsystems of the XC233xA.
The block diagram gives an overview of the on-chip components and the advanced
internal bus structure of the XC233xA.
Figure 4
Block Diagram
DPRAM
CPU
PM
U
DM
U
ADC0
Module
10 -Bit
8-Bit
RTC
MCHK
Interrupt & PEC
EBC
LXBus Control
External Bus
Control
DSRAM
System Functions
Clock, Reset, Power
Control, StandBy RAM
OCDS
Debug Support
Interrupt Bus
Periph
eral
D
a
ta
Bu
s
Analog and Digital General Purpose IO (GPIO) Ports
MC_BL_BLOCKDIAGRAM
GPT
5
Timers
CC2
Modules
16
Chan.
LXB
u
s
WDT
Multi
CAN
Shared
MOs
for
Nodes
CCU6 x
Modules
3+1
Chan.
each
USICx
Modules
2
Chan.
each
PSRAM
Flash
Memory
IM
B
MAC Unit
MPU
ADC1
Module
10 -Bit
8-Bit
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