參數(shù)資料
型號： SAF7843HL
廠商： NXP Semiconductors N.V.
元件分類： 存儲器
英文描述： One chip CD audio device with integrated MP3-WMA decoder
封裝： SAF7843HL/M295<SOT486-1 (LQFP144)|<<http://www.nxp.com/packages/SOT486-1.html<1<Always Pb-free,;SAF7849HL/M245<SOT486-1 (LQFP144)|<<http://www.nxp.com/packages/SOT486-1.h
文件頁數(shù)： 73/93頁
文件大?。?/td> 396K
代理商： SAF7843HL
SAF784X_2
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 9 May 2008
73 of 93
NXP Semiconductors
SAF784x
One chip CD audio device with integrated MP3/WMA decoder
7.5 Embedded KFlash interface
The KFlash controller is an interface between the embedded Flash memory device and
AHB bus.
The AHB embedded Flash controller connects embedded Flash memory devices to the
AHB bus.
The embedded Flash controller supports full AHB bus protocol and will never generate a
retry or split response.
The data path between the memory and the controller is fixed at 128-bit width to
implement a double 128-bit cache line for creating a read performance comparable to
reading SRAM, for cache hits.
The controller features a programmable number of wait cycles. A user can select between
0 and 255 wait cycles, to allow for an optimal performance with the chosen Flash instance
at the clock frequency of the specific application.
The design is optimized to interface with an ARM CPU with embedded JTAG tap
controller:
32-bit AMBA AHB protocol with 76 MHz AHB operating frequency
AHB reads for sub-word and word size
AHB register interface
Zero wait-states, sustained read throughput on linear reads
Programmable wait-state counter for read with cache miss, including zero wait-state
for low frequencies
Cache for 2
×
128-bit words
JTAG interface access to Flash memory
7.6 RAM interface
The RAM interface provides an interface between the on-board 110 kB SRAM memory
and the ARM via the AHB bus. The specification of this interface is described below.
32-bit AHB interface width
76 MHz maximum AHB operating frequency
Configured for low latency
AHB reads and writes for sub-words and word sizes
32-bit data
7.7 I
2
C-bus interface
This interface can be used as an I
2
C-bus slave or master and is fully compliant with the
I
2
C-bus specification. The specification of this interface is described as follows:
Master/slave configurations
Address 0x6E
76 MHz maximum AHB operating frequency
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SAF7843HL/M295,557 功能描述:音頻 DSP IC AUD DECODER RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube
SAF7846HL/M210,557 功能描述:音頻 DSP 1 chip CD Audio Dev w/Integrated decoder RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube
SAF7847HL/M201,557 功能描述:音頻 DSP 1 chip CD Audio Dev w/Integrated decoder RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube
SAF7849HL/M245,557 功能描述:音頻 DSP IC AUD DECODER RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube
SAF7849HL/M295,557 功能描述:音頻 DSP IC AUD DECODER RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube
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