參數(shù)資料
型號: SAF7118
廠商: NXP Semiconductors N.V.
英文描述: Multistandard video decoder with adaptive comb filter and component video input
中文描述: 多標(biāo)準(zhǔn)視頻解碼器與自適應(yīng)梳狀濾波器和分量視頻輸入
文件頁數(shù): 156/173頁
文件大小: 950K
代理商: SAF7118
2004 Jul 22
156
Philips Semiconductors
Product speci
fi
cation
Multistandard video decoder with adaptive
comb
fi
lter and component video input
SAF7118
15.7.10 S
UBADDRESSES
A4H
TO
A6H
Table 128
Luminance brightness control; register set A [A4H[7:0]] and B [D4H[7:0]]
Table 129
Luminance contrast control; register set A [A5H[7:0]] and B [D5H[7:0]]
Table 130
Chrominance saturation control; register set A [A6H[7:0]] and B [D6H[7:0]]
15.7.11 S
UBADDRESSES
A8H
TO
AEH
Table 131
Horizontal luminance scaling increment; register set A [A8H[7:0]; A9H[7:0]] and B [D8H[7:0]; D9H[7:0]]
Note
1.
Bits XSCY[15:13] are reserved and are set to logic 0.
LUMINANCE
BRIGHTNESS CONTROL
CONTROL BITS D7 TO D0
BRIG7
BRIG6
BRIG5
BRIG4
BRIG3
BRIG2
BRIG1
BRIG0
Value = 0
Nominal value = 128
Value = 255
0
1
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
LUMINANCE CONTRAST
CONTROL
CONTROL BITS D7 TO D0
CONT7
CONT6
CONT5
CONT4
CONT3
CONT2
CONT1
CONT0
Gain = 0
Gain =
1
64
Nominal gain = 64
Gain =
127
64
0
0
0
0
0
0
1
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
1
0
1
CHROMINANCE
SATURATION CONTROL
CONTROL BITS D7 TO D0
SATN7
SATN6
SATN5
SATN4
SATN3
SATN2
SATN1
SATN0
Gain = 0
Gain =
1
64
Nominal gain = 64
Gain =
127
64
0
0
0
0
0
0
1
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
1
0
1
HORIZONTAL LUMINANCE
SCALING INCREMENT
CONTROL BITS
A [A9H[7:4]]
B [D9H[7:4]]
A [A9H[3:0]]
B [D9H[3:0]]
A [A8H[7:4]]
B [D8H[7:4]]
A [A8H[3:0]]
B [D8H[3:0]]
XSCY[15:12]
(1)
XSCY[11:8]
XSCY[7:4]
XSCY[3:0]
Scale =
1024
1
(theoretical) zoom
Scale =
1024
294
, lower limit de
fi
ned by
data path structure
Scale =
1024
1023
zoom
Scale = 1, equals 1024
Scale =
1024
1025
downscale
Scale =
1024
8191
downscale
0000
0000
0000
0001
0000
0010
0000
0110
0000
0000
0000
0001
0011
0100
0100
1111
1111
0000
0000
1111
1111
0000
0001
1111
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