參數(shù)資料
型號(hào)： SAF-C161S-LM 3V AA
廠商： Infineon Technologies
文件頁(yè)數(shù)： 8/75頁(yè)
文件大小： 0K
描述： IC MCU 16BIT ROM/LESS MQFP-80-7
標(biāo)準(zhǔn)包裝： 1
系列： C16xx
核心處理器： C166
芯體尺寸： 16-位
速度： 20MHz
連通性： EBI/EMI，SPI，UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 63
程序存儲(chǔ)器類型： ROMless
RAM 容量： 2K x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 3.6 V
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 80-QFP
包裝： 剪切帶 (CT)
其它名稱： SAF-C161S-LM3VAACT
SAF-C161S-LM3VAACT-ND
SAF-C161S-LM3VAAINCT
C161S
Functional Description
Data Sheet
12
V1.0, 2003-11
3.2
External Bus Controller
All of the external memory accesses are performed by a particular on-chip External Bus
Controller (EBC). It can be programmed either to Single Chip Mode when no external
memory is required, or to one of four different external memory access modes, which are
as follows:
16-/18-/20-/22-bit Addresses, 16-bit Data, Demultiplexed
16-/18-/20-/22-bit Addresses, 16-bit Data, Multiplexed
16-/18-/20-/22-bit Addresses, 8-bit Data, Multiplexed
16-/18-/20-/22-bit Addresses, 8-bit Data, Demultiplexed
In the demultiplexed bus modes, addresses are output on PORT1 and data is
input/output on PORT0 or P0L, respectively. In the multiplexed bus modes both
addresses and data use PORT0 for input/output.
Important timing characteristics of the external bus interface (Memory Cycle Time,
Memory Tri-State Time, Length of ALE and Read Write Delay) have been made
programmable to allow the user the adaption of a wide range of different types of
memories and external peripherals.
In addition, up to 4 independent address windows may be defined (via register pairs
ADDRSELx / BUSCONx) which control the access to different resources with different
bus characteristics. These address windows are arranged hierarchically where
BUSCON4 overrides BUSCON3 and BUSCON2 overrides BUSCON1. All accesses to
locations not covered by these 4 address windows are controlled by BUSCON0.
Up to 4 external CS signals (3 windows plus default) can be generated in order to save
external glue logic. The C161S offers the possibility to switch the CS outputs to an
unlatched mode. In this mode the internal filter logic is switched off and the CS signals
are directly generated from the address. The unlatched CS mode is enabled by setting
CSCFG (SYSCON.6).
For applications which require less than 4 Mbytes of external memory space, this
address space can be restricted to 1 Mbyte, 256 Kbytes, or to 64 Kbytes. In this case
Port 4 outputs four, two, or no address lines at all. It outputs all 6 address lines, if the full
address width is used.
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