參數(shù)資料
型號: SAB-C163-LF
廠商: SIEMENS AG
英文描述: 16-bit CMOS Single-Chip Microcontroller
中文描述: 16位CMOS單片機
文件頁數(shù): 57/68頁
文件大?。?/td> 625K
代理商: SAB-C163-LF
11Aug98@14:48h Intermediate Version
Semiconductor Group
55
1998-08
C163-L
AC Characteristics
CLKOUT and READY
(Standard Supply Voltage Range)
(Operating Conditions apply,
C
L
= 100 pF)
1) These timings are given for test purposes only, in order to assure recognition at a specific clock edge.
2) Demultiplexed bus is the worst case. For multiplexed bus 2TCL are to be added to the maximum values. This
adds even more time for deactivating READY.
The 2t
A
and t
C
refer to the next following bus cycle, t
F
refers to the current bus cycle.
Parameter
Symbol
Max. CPU Clock
= 25 MHz
Variable CPU Clock
1 / 2TCL = 1 to 25 MHz
Unit
min.
max.
min.
max.
CLKOUT cycle time
t
29
t
30
t
31
CC 40
CC 14
CC 10
40
2TCL
2TCL
ns
CLKOUT high time
TCL – 6
ns
CLKOUT low time
TCL – 10
ns
CLKOUT rise time
t
32
t
33
t
34
CC –
4
4
ns
CLKOUT fall time
CC –
CC 0 +
t
A
4
10 +
t
A
0 +
t
A
4
10 +
t
A
ns
CLKOUT rising edge to
ALE falling edge
ns
Synchronous READY
setup time to CLKOUT
t
35
SR 14
14
ns
Synchronous READY
hold time after CLKOUT
t
36
SR 4
4
ns
Asynchronous READY
low time
t
37
SR 54
2TCL + 14
ns
Asynchronous READY
setup time
1)
t
58
SR 14
14
ns
Asynchronous READY
hold time
1)
t
59
SR 4
4
ns
Async. READY hold time
after RD, WR high
(Demultiplexed Bus)
2)
t
60
SR 0
0
+ 2
t
A
+
t
C
+
t
F
2)
0
TCL - 20
+
2
t
A
+
t
C
+
t
F
2)
ns
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