參數(shù)資料
型號(hào): SAA7367
廠商: NXP SEMICONDUCTORS
元件分類: ADC
英文描述: Bitstream conversion ADC for digital audio systems
中文描述: 1-CH 18-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO24
封裝: 7.50 MM, PLASTIC, MS-013AD, SOT-137-1, SOP-24
文件頁(yè)數(shù): 5/20頁(yè)
文件大?。?/td> 113K
代理商: SAA7367
1998 Nov 17
5
Philips Semiconductors
Product specification
Bitstream conversion ADC for
digital audio systems
SAA7367
Table 1
SWS polarity
Table 2
Selection of serial interface formats via TEST1
SLAVE
24
TTL level input; used to select the serial interface operating mode:
SLAVE = HIGH selects slave mode
SLAVE = LOW selects master mode
CONDITIONS
POLARITY
SLAVE AND TEST1
SWS
SFOR
SLAVE = LOW or TEST1 = LOW
LOW
LOW
LOW
LOW
LOW
HIGH
LOW
HIGH
left data
right data
right data
left data
SLAVE = HIGH and TEST1 = HIGH
CONDITIONS
SELECTED FORMAT
SFOR
TEST1
HIGH
LOW
HIGH
LOW
HIGH
format 1
format 3
format 2
format 4
LOW
SYMBOL
PIN
DESCRIPTION
Fig.2 Pin configuration.
handbook, halfpage
SFOR
STDB
OVLD
CKIN
VDDD
VSSD
SDO
SWS
SCK
TEST1
HPEN
TESTB
SLAVE
VDDA
VrefL
BIL
VDACP
VDACN
BOL
BOR
BIR
VrefR
Iref
VSSA
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
SAA7367
MGE644
FUNCTIONAL DESCRIPTION
General
The SAA7367 is a bitstream conversion CMOS ADC for
digital audio systems. The conversion is achieved using a
third-order Sigma-Delta Modulator (SDM), running at
128 times the output sample frequency (f
s
). The high
oversampling ratio greatly simplifies the design of the
analog input anti-alias filter. In most events, the internal
buffer operational amplifier, configured as a low-pass filter,
will suffice. The 1-bit code from the SDM is filtered and
down-sampled (decimated) to 1f
s
by Finite Impulse
Response (FIR) filters. An optional I
2
R high-pass filter is
provided to remove DC, if required. The device has been
designed with ease of use, low board area and low
application costs in mind.
Clock frequency
The external clock input on pin CKIN runs at 256f
s
, which
can range from 18 to 50 kHz.
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