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參數(shù)資料
| 型號： | SAA7346 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Shock absorbing RAM addresser |
| 中文描述： | 減震內(nèi)存發(fā)件人 |
| 文件頁數(shù)： | 7/24頁 |
| 文件大?。?/td> | 113K |
| 代理商： | SAA7346 |
July 1994
7
Philips Semiconductors
Preliminary specification
Shock absorbing RAM addresser
SAA7346
Fig.5 State machine flow diagram.
handbook, full pagewidth
SHOCK
7
HOLD
4
first nibble
FILL
3
FILL
1
FILL
2
SSD
NSF +
S_NSF
SSD
SSD
RESET
0
reset and sow
flush + reset
flush + reset +
(empty and echo)
HOLD
5
HOLD
6
first nibble
full
SSD
PFB
PFB
flush + reset
SSD and
(NSF + S_NSF)
MGB432
During normal operation the FIFO will fill up because
writing is carried out twice as fast as reading; this is the fill
mode. If the FIFO is full the monitor will detect and set the
full flag. At the same time the fill flag will be reset thus
preventing audio data from being written in to the FIFO.
When the microcontroller reads the full flag from the status
register, the servo control should jump back one track. The
microcontroller enters a wait loop until the same absolute
time subcode frame turns by again; this is the hold mode.
When the spot is found again the microcontroller should
set the PFB flag in the command register and the
SAA7346 will resume writing to the DRAM. While in fill
mode the write pointer address is saved at the end of each
subcode frame. When the player exists hold mode it
restores the saved address and continues writing after the
last sample.
When a shock is detected the SAA7346 will enter shock
mode. The shock mode will last until the PFB is set by the
microcontroller or the FIFO is flushed, reset or runs empty.
Microcontroller interface
The SAA7346 has a 3-line microcontroller interface which
is compatible with TDA1301, TDA1303 and SAA7345.
W
RITING DATA TO THE
SAA7346
The SAA7346 command register is shown in Table 1. This
can be written to via the microcontroller interface as shown
in Fig.6. The command register flags functions are shown
in Table 2.
Table 1
SAA7346 microcontroller interface registers.
REGISTER
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
μ
Csd
SSD
BIT 0
Command
Status
flush
Lm
bypass
Lm1
echo
FRM_ER
jmp_bz
NSF
otd_p
full
e_rot_sd
empty
PFB
fill
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA7346H | Shock absorbing RAM addresser |
| SAA7348GP | All Compact Disc Engine ACE |
| SAA7350 | 20-BIT INPUT BITSTREAM CONVERSION DAC FOR DIGITAL AUDIO SYSTEMS |
| SAA7356HL | 1394 SBP-2 link layer controller |
| SAA7360GPB | Analog-to-Digital Converter， 18-Bit |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA7346H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Shock absorbing RAM addresser |
| SAA7348GP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:All Compact Disc Engine ACE |
| SAA7350 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:20-BIT INPUT BITSTREAM CONVERSION DAC FOR DIGITAL AUDIO SYSTEMS |
| SAA7356HL | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1394 SBP-2 link layer controller |
| SAA7360 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Bitstream conversion ADC for digital audio systems |
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