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參數(shù)資料
| 型號： | SAA7129H |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 顏色信號轉(zhuǎn)換 |
| 英文描述： | Digital video encoder |
| 中文描述： | COLOR SIGNAL ENCODER, PQFP44 |
| 封裝： | 10 X 10 X 1.75 MM, PLASTIC, SOT-307-2, QFP-44 |
| 文件頁數(shù)： | 30/56頁 |
| 文件大?。?/td> | 192K |
| 代理商： | SAA7129H |
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2000 Mar 08
30
Philips Semiconductors
Product specification
Digital video encoder
SAA7128H; SAA7129H
Table 50
Subaddress 6BH
Table 51
Selection of the signal type on pin RCV1
BIT
SYMBOL
DESCRIPTION
7
6
5
SRCV11
SRCV10
TRCV2
These 2 bits define signal type on pin RCV1; see Table 51
0 = horizontal synchronization is taken from RCV1 port (at bit SYMP = LOW) or from
decoded frame sync of “ITU-R BT.656”input (at bit SYMP = HIGH); default state after
reset
1 = horizontal synchronization is taken from RCV2 port (at bit SYMP = LOW)
0 = pin RCV1 is switched to input; default state after reset
1 = pin RCV1 is switched to output
0 = polarity of RCV1 as output is active HIGH, rising edge is taken when input; default
state after reset
1 = polarity of RCV1 as output is active LOW, falling edge is taken when input
When CBLF = 0.
If ORCV2 = 1, pin RCV2 provides an HREF signal (horizontal reference pulse that is
defined by RCV2S and RCV2E, also during vertical blanking interval); default state
after reset.
If ORCV2 = 0 and bit SYMP = 0, signal input to RCV2 is used for horizontal
synchronization only (if TRCV2 = 1); default state after reset.
When CBLF = 1.
If ORCV2 = 1, pin RCV2 provides a ‘composite-blanking-not’ signal, for example a
reference pulse that is defined by RCV2S and RCV2E, excluding vertical blanking
interval, which is defined by FAL and LAL.
If ORCV2 = 0 and bit SYMP = 0, signal input to RCV2 is used for horizontal
synchronization (if TRCV2 = 1) and as an internal blanking signal.
0 = pin RCV2 is switched to input; default state after reset
1 = pin RCV2 is switched to output
0 = polarity of RCV2 as output is active HIGH, rising edge is taken when input,
respectively; default state after reset
1 = polarity of RCV2 as output is active LOW, falling edge is taken when input,
respectively
4
ORCV1
3
PRCV1
2
CBLF
1
ORCV2
0
PRCV2
SRCV11
SRCV10
RCV1
FUNCTION
0
0
1
0
1
0
VS
FS
FSEQ
Vertical Sync each field; default state after reset
Frame Sync (odd/even)
Field Sequence, vertical sync every fourth field (PAL = 0), eighth field
(PAL = 1) or twelfth field (SECAM = 1)
not applicable
1
1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA7130 | PCI video broadcast decoder |
| SAA7134 | PCI audio and video broadcast decoder |
| SAA7135 | Single-chip, analog TV video/stereo DECODER |
| SAA7139 | The Digital Video Decoder/Encoder Modules(數(shù)字視頻譯碼器/編碼器模塊) |
| SAA7138 | The Digital Video Decoder/Encoder Modules(數(shù)字視頻譯碼器/編碼器模塊) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA7129H/V1,518 | 功能描述:IC DIGITAL VIDEO DECODER 44QFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
| SAA7129H/V1,557 | 功能描述:IC DIGITAL VIDEO ENCODER 44-QFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
| SAA7129HB | 制造商:NXP Semiconductors 功能描述: |
| SAA7130 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:PCI video broadcast decoder |
| SAA7130HL | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:PCI video broadcast decoder |
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