
2003 Dec 09
24
Philips Semiconductors
Product specification
Digital video encoder
SAA7128AH; SAA7129AH
Table 35
GAINV values
Note
1.
All IRE values are rounded up.
Table 36
Subaddress 5DH
Table 37
BLCKL values
Notes
1.
2.
3.
All IRE values are rounded up.
Output black level/IRE = BLCKL
×
2/6.29 + 28.9.
Output black level/IRE = BLCKL
×
2/6.18 + 26.5.
Table 38
Subaddress 5EH
CONDITIONS
(1)
ENCODING
white-to-black = 92.5 IRE
GAINV[8:0] = 0
GAINV[8:0] = 165 (A5H)
white-to-black = 100 IRE
GAINV[8:0] = 0
GAINV[8:0] = 175 (AFH)
GAINV[8:0] = 129 (81H)
GAINV =
1.55
×
nominal to +1.55
×
nominal
output subcarrier of V contribution = 0
output subcarrier of V contribution = nominal
GAINV =
1.46
×
nominal to +1.46
×
nominal
output subcarrier of V contribution = 0
output subcarrier of V contribution = nominal
nominal GAINV for SECAM encoding
BIT
SYMBOL
DESCRIPTION
7
6
GAINU8
DECOE
MSB of the 9-bit code that sets the variable gain for the C
B
signal; see Table 32.
real-time control:
0 = disable odd/even field control bit from RTCI
1 = enable odd/even field control bit from RTCI (see Fig.22)
variable black level; input representation in accordance with “ITU-R BT601”
see Table 37
5 to 0
BLCKL[5:0]
CONDITIONS
(1)
ENCODING
(1)
white-to-sync = 140 IRE; note 2 recommended value: BLCKL = 58 (3AH)
BLCKL = 0; note 2
output black level = 29 IRE
BLCKL = 63 (3FH); note 2
output black level = 49 IRE
white-to-sync = 143 IRE; note 3 recommended value: BLCKL = 51 (33H)
BLCKL = 0; note 3
output black level = 27 IRE
BLCKL = 63 (3FH); note 3
output black level = 47 IRE
BIT
SYMBOL
DESCRIPTION
7
6
GAINV8
DECPH
MSB of the 9-bit code that sets the variable gain for the C
R
signal; see Table 34.
real-time control:
0 = disable subcarrier phase reset bit from RTCI
1 = enable subcarrier phase reset bit from RTCI (see Fig.22)
variable blanking level; see Table 39
5 to 0
BLNNL[5:0]