- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄372113 > SAA7128 (NXP Semiconductors N.V.) Digital video encoder PDF資料下載
參數(shù)資料
| 型號： | SAA7128 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Digital video encoder |
| 中文描述： | 數(shù)字視頻編碼器 |
| 文件頁數(shù)： | 19/56頁 |
| 文件大?。?/td> | 192K |
| 代理商： | SAA7128 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁當(dāng)前第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁
2000 Mar 08
19
Philips Semiconductors
Product specification
Digital video encoder
SAA7128H; SAA7129H
Table 12
Subaddress 2CH
Table 13
Subaddress 2DH
Table 14
Subaddress 38H
Table 15
Subaddress 39H
BIT
SYMBOL
DESCRIPTION
7
CGEN
0 = copy generation data output is disabled; default state after reset
1 = copy generation data output is enabled
These 3 bits are reserved; each must be set to logic 0.
6
5
4
3
2
1
0
CG19
CG18
CG17
CG16
Remaining bits of copy generation code.
BIT
SYMBOL
DESCRIPTION
7
CVBSEN1
0 = luminance output signal is switched to Y DAC; default state after reset
1 = CVBS output signal is switched to Y DAC
0 = chrominance output signal is switched to C DAC; default state after reset
1 = CVBS output signal is switched to C DAC
0 = DAC for CVBS output in 3-state mode (high-impedance); default state after reset
1 = DAC for CVBS output in normal operation mode
0 = DAC for Y output in 3-state mode (high-impedance); default state after reset
1 = DAC for Y output in normal operation mode
0 = DAC for C output in 3-state mode (high-impedance); default state after reset
1 = DAC for C output in normal operation mode
0 = DAC for RED output in 3-state mode (high-impedance); default state after reset
1 = DAC for RED output in normal operation mode
0 = DAC for GREEN output in 3-state mode (high-impedance); default state after reset
1 = DAC for GREEN output in normal operation mode
0 = DAC for BLUE output in 3-state mode (high-impedance); default state after reset
1 = DAC for BLUE output in normal operation mode
6
CVBSEN0
5
CVBSTRI
4
YTRI
3
CTRI
2
RTRI
1
GTRI
0
BTRI
BIT
SYMBOL
DESCRIPTION
7 to 5
4 to 0
GY[4:0]
These 3 bits are reserved; each must be set to logic 0.
Gain luminance of RGB (C
R
, Yand C
B
) output, ranging from (1
16
32
) to (1 +
15
32
).
Suggested nominal value =
6 (11010b), depending on external application.
BIT
SYMBOL
DESCRIPTION
7 to 5
4 to 0
GCD[4:0]
These 3 bits are reserved; each must be set to logic 0.
Gain colour difference of RGB (C
R
, Yand C
B
) output, ranging from
(1
16
32
) to (1 +
15
32
). Suggested nominal value =
6 (11010b), depending on external
application.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA7128H | Digital video encoder |
| SAA7129 | Digital video encoder |
| SAA7129H | Digital video encoder |
| SAA7130 | PCI video broadcast decoder |
| SAA7134 | PCI audio and video broadcast decoder |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA7128A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital video encoder |
| SAA7128AH | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital video encoder |
| SAA7128H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital video encoder |
| SAA7129 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital video encoder |
| SAA7129/DENC29A | 制造商:NXP Semiconductors 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。