- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄372113 > SAA7109AE (NXP SEMICONDUCTORS) HD-CODEC PDF資料下載
參數(shù)資料
| 型號： | SAA7109AE |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | HD-CODEC |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA156 |
| 封裝： | 15 X 15 MM, 1.05 MM HEIGHT, PLASTIC, MO-192, SOT-700-1, BGA-156 |
| 文件頁數(shù)： | 24/197頁 |
| 文件大小： | 983K |
| 代理商： | SAA7109AE |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁當(dāng)前第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁第183頁第184頁第185頁第186頁第187頁第188頁第189頁第190頁第191頁第192頁第193頁第194頁第195頁第196頁第197頁
2004 Jun 29
24
Philips Semiconductors
Product specification
HD-CODEC
SAA7108AE; SAA7109AE
8.17
Pattern generator for HD sync pulses
The pattern generator provides an appropriate
synchronization pattern for the video data path in auxiliary
monitororHDTVmode,respectively.Itprovidesmaximum
flexibility in terms of raster generation for all interlaced and
non-interlaced computer graphics or ATSC formats. The
sync engine is capable of providing a combination of
event-value pairs which can be used to insert certain
values at specified times in the outgoing data stream. It
can also be used to generate digital signals associated
with time events. They can be used as digital horizontal
andverticalsynchronizationsignalsonpins HSM_CSYNC
and VSM.
The picture position is adjustable through the
programmable relationship between the sync pulses and
the video contents.
The generation of embedded analog sync pulses is bound
to a number of events which can be defined for a line.
Several of these line timing definitions can exist in parallel.
For the final sync raster composition a certain sequence of
lineswithdifferent synceventpropertieshastobedefined.
The sequence specifies a series of line types and the
number of occurrences of this specific line type. After the
sequence has been completed, it restarts from the
beginning. All pulse shapes are filtered internally in order
to avoid ringing after analog post filters.
The sequence of the generated pulse stream must fit
precisely to the incoming data stream in terms of the total
number of pixels per line and lines per frame.
The sync engines flexibility is achieved by using a
sequence of linked lists carrying the properties for the
image, the lines as well as fractions of lines. Figure 11
illustrates the context between the various tables.
The first table serves as an array to hold the correct
sequence of lines composing the synchronization raster. It
can contain up to 16 entries. Each entry holds a 4-bit index
to the next table and a 10-bit counter value which specifies
how often this particular line is invoked. If the necessary
line count for a particular line exceeds the 10 bits, it has to
use two table entries.
The 4-bit index in the line count array points to the line type
array. It holds up to 15 entries where, index 0 is not used,
index 1 points to the first entry, index 2 to the second entry
of the line type array etc.
Each entry of the line type array can hold up to 8 index
pointersto anothertable.Theseindices pointto portionsof
a line pulse pattern: A line could be split up e.g. into a sync,
a blank, and an active portion followed by another blank
portion, occupying four entries in one table line.
Each index of this table points to a particular line of the
next table in the linked list. This table is called the line
pattern array and each of the up to seven entries stores up
to four pairs of a duration in pixel clock cycles and an index
to a value table. The table entries are used to define
portions of a line representing a certain value for a certain
number of clock cycles.
The value specified in this table is actually another 3-bit
index into a value array which can hold up to eight 8-bit
values. If bit 4 (MSB) of the index is logic 1, the value is
inserted into the G or Y signal only; if bit 4 = 0, the
associated value is inserted into all three signals.
Two additional bits of the entries in the value array (LSBs
of the second byte) determine if the associated events
appearasa digitalpulse ontheHSM_CSYNC and/orVSM
outputs.
To ease the trigger set-up for the sync generation module,
a set of registers is provided to set up the screen raster
defined as width and height. A trigger position can be
specified as an x, y co-ordinate within the overall
dimensions of the screen raster. If the x, y counter
matches the specified co-ordinates, a trigger pulse is
generated which pre-loads the tables with their initial
values.
Table 6 outlines an example on how to set up the sync
tables for a 1080i HD raster.
Important note:
Due to a problem in the programming interface, writing to
the line pattern array (address D2) might destroy the data
of the line type array (address D1). A work around is to
write the line pattern array data before writing the line type
array. Reading of the arrays is possible but all address
pointers must be initialized before the next write operation.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA7110A | Digital Multistandard Colour Decoder(數(shù)字多標(biāo)準(zhǔn)彩色譯碼器) |
| SAA7111A | Enhanced Video Input Processor EVIP |
| SAA7111AH | Enhanced Video Input Processor EVIP |
| SAA7111AHZ | GT 13C 13#16 SKT PLUG |
| SAA7112 | Decoder With High-Performance Scaler(HPS) for Image Port (PELICAN)(運(yùn)用在影像端口中的帶有高性能定標(biāo)器的譯碼器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA7109AE/V1,518 | 功能描述:視頻 IC HD- VIDEO CODEC RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SAA7109AE/V1,557 | 功能描述:視頻 IC HD- VIDEO CODEC RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SAA7109AE/V1/G | 功能描述:視頻 IC PC CODEC (W/OUT MICROVISION) RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SAA7109AE/V1/G,518 | 功能描述:視頻 IC SAA7109AE/LBGA156/REEL13DP//V1 RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SAA7109AE/V1/G,557 | 功能描述:視頻 IC SAA7109AE/LBGA156/TRAYDPM//V1/ RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。