參數(shù)資料
型號(hào): SAA7105H
廠商: NXP Semiconductors N.V.
元件分類: 通用總線功能
英文描述: Digital video encoder
文件頁(yè)數(shù): 28/71頁(yè)
文件大?。?/td> 354K
代理商: SAA7105H
2004 Mar 04
28
Philips Semiconductors
Product specification
Digital video encoder
SAA7104H; SAA7105H
7.23
I
2
C-bus format
Table 16
I
2
C-bus write access to control registers; see Table 22
Table 17
I
2
C-bus write access to the HD line count array (subaddress D0H); see Table 22
Table 18
I
2
C-bus write access to cursor bit map (subaddress FEH); see Table 22
Table 19
I
2
C-bus write access to colour look-up table (subaddress FFH); see Table 22
Table 20
I
2
C-bus read access to control registers; see Table 22
Table 21
I
2
C-bus read access to cursor bit map or colour LUT; see Table 22
Table 22
Explanations of Tables 16 to 21
Notes
1.
2.
X is the read/write control bit; X = logic 0 is order to write; X = logic 1 is order to read.
If more than 1 byte of DATA is transmitted, then auto-increment of the subaddress is performed.
S
1 0 0 0 1 0 0 0
A
SUBADDRESS
A
DATA 0
A
--------
DATA n
A
P
S
1 0 0 0 1 0 0 0
A
D0H
A
RAM ADDRESS
A
DATA 00
A
DATA 01
A
--------
DATA n
A
P
S
1 0 0 0 1 0 0 0
A
FEH
A
RAM ADDRESS
A
DATA 0
A
--------
DATA n
A
P
S
1 0 0 0 1 0 0 0
A
FFH
A
RAM ADDRESS
A
DATA 0R
A
DATA 0G
A
DATA 0B
A
--------
P
S
1 0 0 0 1 0 0 0
A
SUBADDRESS
A
Sr
1 0 0 0 1 0 0 1
A
DATA 0
Am
--------
DATA n
Am
P
S 1 0 0 0 1 0 0 0 A
FEH
or
FFH
A RAM ADDRESS A Sr 1 0 0 0 1 0 0 1 A DATA 0 Am -------- DATA n Am P
CODE
DESCRIPTION
S
Sr
1 0 0 0 1 0 0 X; note 1
A
Am
SUBADDRESS; note 2
DATA
--------
P
RAM ADDRESS
START condition
repeated START condition
slave address
acknowledge generated by the slave
acknowledge generated by the master
subaddress byte
data byte
continued data bytes and acknowledges
STOP condition
start address for RAM access
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