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參數(shù)資料
| 型號(hào)： | SAA5284GP |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | Multimedia video data acquisition circuit |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP44 |
| 封裝： | 14 X 14 X 2.20 MM, PLASTIC, QFP-44 |
| 文件頁(yè)數(shù)： | 19/24頁(yè) |
| 文件大?。?/td> | 159K |
| 代理商： | SAA5284GP |
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1998 Feb 05
19
Philips Semiconductors
Objective specification
Multimedia video data acquisition circuit
SAA5284
Fig.10 Application circuit diagram for ISA card.
(1) Option of 13.5, 15 and 16 MHz or direct feed from external clock.
(2) A diode to V
DDD
is recommended for ESD protection.
(3) Pin DMACK must be connected to V
DDD
if DMA is not used.
handbook, full pagewidth
MGG742
75
75
27 k
22
pF
100 nF
BLACK
IREF
VSSA
VSSD3VSSD1VSSD2
VSSA = 0 V
VSSD = 0 V
VSSD = 0 V
supply decoupling
SEL1
SEL0
CS1
CVBS0
CVBS1
OSCIN
OSCOUT
OSCGND
SDA
SCL
HREF
LLC
LLC2
VPOIN1
VPOIN0
100 nF
CVBS0
CVBS1
100 nF
12 MHz
(1
)
12
16
41
6
13
15
14
8
7
9
3
4
2
42
43
39
38
17
40
18
19
11
10
GND
ADDRESS
DECODER
e.g.
PLUS153
or
74 SERIES
LOGIC
VCC
44
22
pF
VSSA = 0 V
VDDA =
+
5 V
VDDA
VDDD
VDDX
VDDD =
+
5 V
VSSA = 0 V
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
A0
A1
A2
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
36
37
1
5
35
2
B9
B8
B7
B6
B5
n.c.
B4
B3
B2
1
INT
RDY
(2)
WR
RD
DMARQ
DMACK
(3)
3
4
5
6
7
8
19
11
B1
9
B0
I0
AEN
I1
I2
I3
I4
I5
I6
I7
A3
A4
A5
A6
A7
A8
A9
18
17
16
15
14
13
12
10
20
RESET
DENB
A0
A1
A2
IRQx
I/O RDY
IOW
IOR
DACKx
RESET
n.c.
CS0
SAA5284
VSSD = 0 V
VDDD = 5 V
VDDA
VDDD
VSSA
VSSD
100
nF
100
nF
10
μ
F
10
μ
F
+
5 V
0 V
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