參數(shù)資料
型號(hào): SAA5284GP
廠商: NXP SEMICONDUCTORS
元件分類: 消費(fèi)家電
英文描述: Multimedia video data acquisition circuit
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP44
封裝: 14 X 14 X 2.20 MM, PLASTIC, QFP-44
文件頁數(shù): 14/24頁
文件大小: 159K
代理商: SAA5284GP
1998 Feb 05
14
Philips Semiconductors
Objective specification
Multimedia video data acquisition circuit
SAA5284
handbook, full pagewidth
MGK147
t7
t2
t5
t3
t6
t4
t1
D7 to D0
RD
(1)
DMACK
DMARQ
valid data
valid data
CS
(same signal
as DMACK)
Fig.5 Intel mode interface DMA cycle timing.
(1) Read data pipelined, so no RD LOW to data valid set-up time.
Table 5
Intel-mode interface DMA cycle timing (12 MHz clock)
Note
1.
This timing will be up to 3 clock cycles for the first read in DMA transfer.
SYMBOL
DESCRIPTION
MIN.
MAX.
UNIT
t
1
t
2
t
3
t
4
t
5
t
6
t
7
DMARQ to DMACK
RD LOW to DMARQ LOW
cycle time
DMACK to RD active
data set-up time
data hold time
data hold from DMACK HIGH
0
0
252
0
83
0
212
0
90
(1)
83
ns
ns
ns
ns
ns
ns
ns
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