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參數(shù)資料
| 型號： | SAA5250T |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | Interface for data acquisition and control for multi-standard teletext systems |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO40 |
| 封裝： | PLASTIC, VSOP-40 |
| 文件頁數(shù)： | 8/35頁 |
| 文件大?。?/td> | 173K |
| 代理商： | SAA5250T |
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January 1987
8
Philips Semiconductors
Product specification
Interface for data acquisition and control
(for multi-standard teletext systems)
SAA5250
If R04 = 1; the device operates in the fast mode. Prior to writing into the FIFO memory, the CIDAC searches for a start
to a page which is variable due to the different prefixes:
DIDON (long, medium and short): using the redundant bytes, SOH RS, X RS and SOH X (where X is a bit affected by
a parity error)
NABTS, the least significant bit of the PS byte is set to 1
U.K. teletext, ROW = 0
R1 register
Table 4
R1 Register contents
Note
1.
X = don’t care
If VAL IN/SYNC = 1; the line signal immediately produces a validation signal for the framing code detection.
If VAL OUT = 0; the line signal is used as a starting signal for an internally processed validation signal (see Fig.15). The
framing code window width is fixed at 13 clock periods and the delay is determined by the contents of the R5 register
(R56 to R50).
At any moment the user is able to ensure that the framing code window is correctly located. This is accomplished by the
VAL OUT pin reflecting the internal validation signal. A CBB signal with programmable width (see section ‘R7 register’)
can also be generated, this is used as a data slicer reset pulse by the SAA5230. The line signal is used as the starting
point of the internal CBB signal width fixed by the contents of the R7 register.
If R16 = 0; then bits R15 and R14 provide the format table number using DIDON long and short prefixes (see Table 6).
If R16 = 1; then the format is determined by the contents of the R3 register.
The bits R13 to R10 represent the first channel number to be checked in the prefix. In U.K. teletext mode only 3 bits are
required, so R13 = X.
R17
VAL IN/SYNC
R16 TO R14
FORMAT TABLE
(1)
R13 TO R10
CHANNEL NUMBERS (FIRST DIGIT)
1 = VAL
0 = SYNC
000 = list 1
001 = list 2
010 = list 3
011 = list 4
1XX = maximum/default value used (R3)
first digit hexadecimal value
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA5252 | Line twenty-one acquisition and display LITOD |
| SAA5252P | Line twenty-one acquisition and display LITOD |
| SAA5252T | Line twenty-one acquisition and display LITOD |
| SAA5254 | Integrated VIP and teletext decoder IVT1.1X |
| SAA5254P | Integrated VIP and teletext decoder IVT1.1X |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA5252 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Line twenty-one acquisition and display LITOD |
| SAA5252P | 制造商:NXP Semiconductors 功能描述:TELETEXT DECODER, PDIP24 |
| SAA5252T | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Line twenty-one acquisition and display LITOD |
| SAA5254 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Integrated VIP and teletext decoder IVT1.1X |
| SAA5254GP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Teletext Circuit |
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