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參數(shù)資料
| 型號(hào)： | SAA5250T |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | Interface for data acquisition and control for multi-standard teletext systems |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO40 |
| 封裝： | PLASTIC, VSOP-40 |
| 文件頁(yè)數(shù)： | 26/35頁(yè) |
| 文件大?。?/td> | 173K |
| 代理商： | SAA5250T |
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January 1987
26
Philips Semiconductors
Product specification
Interface for data acquisition and control
(for multi-standard teletext systems)
SAA5250
A.C. CHARACTERISTICS
V
DD
= 5 V
±
10%; Reference levels for all inputs and outputs, V
IH
= 2 V; V
IL
= 0,8 V; V
OH
= 2,4 V; V
OL
= 0,4 V;
C
L
= 50 pF on DB7 to DB0; T
amb
= 0 to 70 = C, unless otherwise specified
PARAMETER
CONDITIONS
SYMBOL
MIN.
TYP.
MAX.
UNIT
Microcontroller
interface
Figs 11 and 12
Cycle time
Address pulse width
RD HIGH or WR to ALE HIGH Fig.11
DS LOW to AS HIGH
ALE LOW to RD
LOW or WR LOW
AS LOW to DS HIGH
Write pulse width
Address and chip select
set-up time
Address and chip select hold
time
Read to data out period
Data hold after RD
R/W to DS set-up time
R/W to DS hold time
Data set-up time
Data hold time
t
CY
t
LHLL
t
AHRD
t
AHRD
t
ALRD
400
50
0
0
30
ns
ns
ns
ns
ns
Fig.12
Fig.11
Fig.12
t
ALRD
t
WL
t
ASL
30
120
10
ns
ns
ns
t
AHL
20
ns
t
RD
t
DR
t
RWS
t
RWH
t
DW
t
WD
10
40
10
50
10
150 or
DCK
+
50
130
100
ns
ns
ns
ns
ns
ns
Fig.12
Fig.12
write cycle
write cycle
Read pulse width
note 3
t
RL
ns
Memory interface
Fig.13
WE LOW to DCK falling edge
WE HIGH to DCK falling edge
MS LOW to DCK rising edge
MS HIGH to DCK rising edge
Address output from DCK
rising edge
Data output from WE falling
edge
Data hold from WE rising edge
Address set-up time to data
t
WEL
t
WEH
t
MSL
t
MSH
t
AV
10
10
10
10
10
80
80
80
85
120
ns
ns
ns
ns
ns
t
DWL
0
10
ns
t
DWH
t
AD
0
3
×
DCK
110
ns
note 4
ns
ns
ns
WE pulse width
MS pulse width
note 5
note 6
t
WEW
t
MSW
3
×
DCK
2
×
DCK
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA5252 | Line twenty-one acquisition and display LITOD |
| SAA5252P | Line twenty-one acquisition and display LITOD |
| SAA5252T | Line twenty-one acquisition and display LITOD |
| SAA5254 | Integrated VIP and teletext decoder IVT1.1X |
| SAA5254P | Integrated VIP and teletext decoder IVT1.1X |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA5252 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Line twenty-one acquisition and display LITOD |
| SAA5252P | 制造商:NXP Semiconductors 功能描述:TELETEXT DECODER, PDIP24 |
| SAA5252T | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Line twenty-one acquisition and display LITOD |
| SAA5254 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Integrated VIP and teletext decoder IVT1.1X |
| SAA5254GP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Teletext Circuit |
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