參數(shù)資料
型號: SAA2510
廠商: NXP SEMICONDUCTORS
元件分類: 消費(fèi)家電
英文描述: Video CD VCD decoder
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝: 14 X 20 X 2.70 MM, PLASTIC, QFP-100
文件頁數(shù): 16/28頁
文件大?。?/td> 126K
代理商: SAA2510
1996 May 21
16
Philips Semiconductors
Preliminary specification
Video CD (VCD) decoder
SAA2510
t
BUF
set-up time STOP to
START
START hold time
set-up time clock rising
edge to START
rise time (SDA and SCL)
fall time (SDA and SCL)
4.7
μ
s
t
HD;STA
t
SU;STA
4
4.7
μ
s
μ
s
t
r
t
f
400 kHz
CLOCK FREQUENCY
V
ILmin
to V
IHmax
V
ILmin
to V
IHmax
50
50
1000
300
ns
ns
f
clk
t
LOW
t
HIGH
t
SU;DAT
t
HD;DAT
t
SU;STO
clock frequency
clock LOW period
period
data set-up time
data hold time
set-up time clock HIGH to
STOP
set-up time STOP to
START
START hold time
set-up time clock rising
edge to START
rise time (SDA and SCL)
fall time (SDA and SCL)
0
1.3
0.6
100
0
0.6
400
kHz
μ
s
μ
s
ns
ns
μ
s
t
BUF
1.3
μ
s
t
HD;STA
t
SU;STA
0.6
0.6
μ
s
μ
s
t
r
t
f
V
ILmin
to V
IHmax
V
ILmin
to V
IHmax
50
50
300
300
ns
ns
Video Output Timing
(Figs. 7 and 8)
16-
BIT VIDEO OUTPUT MODE
t
su
set-up time (CREF, HREF,
UV and Y valid to CLK27)
hold time (CLK27 to CREF,
HREF, UV and Y invalid)
set-up time (UV and Y
valid to CREF rising edge)
hold time (CREF rising
edge to UV and Y invalid)
10
ns
t
h2
3
ns
t
su
6
ns
t
h1
10
ns
8-
BIT VIDEO OUTPUT MODE
t
su
set-up time (HREF and Y
valid to CLK27)
hold time (CLK27 to HREF
and Y invalid)
7
ns
t
h2
5
ns
DRAM Timing
(Fig.9)
t
CYC
t
RP
t
CSH
t
RCD
cycle time
RAS pre-charge time
CAS hold time
RAS to CAS delay time
130
50
70
20
ns
ns
ns
ns
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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