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參數(shù)資料
| 型號： | SAA2500H |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | MPEG Audio Source Decoder |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP44 |
| 封裝： | 10 X 10 MM, 1.75 MM HEIGHT, PLASTIC, SOT-307-2, QFP-44 |
| 文件頁數(shù)： | 33/47頁 |
| 文件大?。?/td> | 199K |
| 代理商： | SAA2500H |
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September 1994
33
Philips Semiconductors
Preliminary specification
MPEG Audio Source Decoder
SAA2500
Halt mode
handbook, halfpage
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L3CLK
L3DATA
MGB504
Fig.17 Data transfer mode.
In between units the L3MODE line will be driven LOW by
the microcontroller to indicate the completion of a basic
unit transfer. This is called ‘halt mode’ (HM). During halt
mode the L3CLK line remains HIGH (to distinguish it from
an addressing mode). The halt mode allows an
implementation of an interface module without a bit
counter. However, an implementation using a bit counter
in the interface module may allow for the L3MODE line to
be kept HIGH in between units (not using the halt mode).
This implementation must also operate correctly if the halt
mode is used. The documentation of the device will have
to indicate clearly whether or not the ‘halt mode’ is
necessary for correct operation of the interface.
D
EVICE INTERFACE RESET
If the microcontroller sends an operational address
‘000000’ with DOM1 and DOM0 also equal to ‘0’ this
indicates that none of the L3 interface devices is allowed
to communicate with the microcontroller during the
following data mode. This enables a different application of
the L3CLK and L3DATA lines as the L3 devices will not
interfere with any communication on these lines as long as
L3MODE remains HIGH (e.g. the L3CLK and L3DATA
lines are normally connected to USART circuits in the
microcontrollers which allow for convenient
communication between microcontrollers).
Any addressing mode with a valid L3 operational address
will re-enable the communication with the corresponding
device.
Devices with a fixed operational address (‘Primary L3
devices’) will react with a device reset condition regardless
of the state of DOM1 and DOM0.
Devices with a programmable operational address
(‘Secondary L3 devices’) can only be put in the interface
reset condition if the DOM1 and DOM0 bits are ‘0’. Other
combinations of DOM1 and DOM0 initiate data transfers
for ‘extended addressing’.
E
XTENDED ADDRESSING
L3 Devices with a programmable address can be informed
of their operational address using a special data transfer.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA2501 | Digital Audio Broadcast DAB decoder |
| SAA2501H | Digital Audio Broadcast DAB decoder |
| SAA2502 | ISO/MPEG Audio Source Decoder |
| SAA2502H | ISO/MPEG Audio Source Decoder |
| SAA2503 | MPEG2 audio decoder(MPEG2 音頻譯碼器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA2500HB-S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video Processing/ENDEC for MPEG |
| SAA2501 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital Audio Broadcast DAB decoder |
| SAA2501H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital Audio Broadcast DAB decoder |
| SAA2501HB-S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital Audio Decoder & Support |
| SAA2502 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:ISO/MPEG Audio Source Decoder |
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