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參數(shù)資料
| 型號： | SAA2500H |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | MPEG Audio Source Decoder |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP44 |
| 封裝： | 10 X 10 MM, 1.75 MM HEIGHT, PLASTIC, SOT-307-2, QFP-44 |
| 文件頁數(shù)： | 16/47頁 |
| 文件大?。?/td> | 199K |
| 代理商： | SAA2500H |
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September 1994
16
Philips Semiconductors
Preliminary specification
MPEG Audio Source Decoder
SAA2500
Fig.9 Input data serial transfer format (slave input).
CDSSY indicates frame start at next valid data.
handbook, full pagewidth
CDSWA
CDSCL
CDSSY
CDS
frame start
MGB497
valid data
invalid data
Whether frame sync signal CDSSY is present or not must
be selected with L3 settings flags MSEL1 and MSEL0
(see Section “SAA2500 settings item”). With respect to the
presence of CDSSY, two situations can be distinguished:
1.
If CDSSY is supplied, CDSWA may change each
CDSCL period.
If CDSSY is not supplied, CDSCL must have a
frequency higher than the bit rate (i.e. CDSWA
cannot be continuously HIGH), and CDSWA HIGH
periods may have only lengths of a multiple of
8 CDSCL periods: data is input in byte bursts.
Furthermore, these bursts must be byte aligned with
the frame bounds: frames are only allowed to start at
the 1
st
, 9
th
, 17
th
etc. bit in a valid data burst. For
applications where data is input in bursts of exactly
one frame, and where CDSCL has a higher frequency
than the bit rate, CDSWA and CDSSY may be
interconnected.
2.
S
LAVE INPUT TRANSFER SPEED OF FIRST FRAME
Both the average and the instantaneous speed at which
data is transferred to the slave input interface are limited.
The data transferring of the first ISO/MPEG frame after
starting to decode is shown in Fig.10.
It shows the transferring of nf bits in one frame between
time 0 and t, where t corresponds to 384 sample periods
(ISO/MPEG layer I input data) or 1152 sample periods
(ISO/MPEG layer II input data). Buffer margin B equals 16
bytes (128 bits). In Fig.10 an effective transferring
characteristic is drawn, representing any of the possible
ISO/MPEG bit rates. However, input data may be
transferred at a higher-than-effective speed (in other
words: CDSCL may have a higher frequency than the
effective bit rate) in periods during which CDSWA is HIGH,
interleaved with invalid data periods where CDSWA is
LOW. In the example of Fig.9 this is used to transfer the
data of the frame in two bursts, as shown by the actual
transferring characteristic. The actual transferring
characteristic has a slope equal to the CDSCL frequency
while CDSWA is HIGH, and is horizontal during the
periods in which CDSWA is LOW (no bits are being
transferred).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA2501 | Digital Audio Broadcast DAB decoder |
| SAA2501H | Digital Audio Broadcast DAB decoder |
| SAA2502 | ISO/MPEG Audio Source Decoder |
| SAA2502H | ISO/MPEG Audio Source Decoder |
| SAA2503 | MPEG2 audio decoder(MPEG2 音頻譯碼器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA2500HB-S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video Processing/ENDEC for MPEG |
| SAA2501 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital Audio Broadcast DAB decoder |
| SAA2501H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital Audio Broadcast DAB decoder |
| SAA2501HB-S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital Audio Decoder & Support |
| SAA2502 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:ISO/MPEG Audio Source Decoder |
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