參數(shù)資料
型號: SAA2500H
廠商: NXP SEMICONDUCTORS
元件分類: 消費(fèi)家電
英文描述: MPEG Audio Source Decoder
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP44
封裝: 10 X 10 MM, 1.75 MM HEIGHT, PLASTIC, SOT-307-2, QFP-44
文件頁數(shù): 22/47頁
文件大?。?/td> 199K
代理商: SAA2500H
September 1994
22
Philips Semiconductors
Preliminary specification
MPEG Audio Source Decoder
SAA2500
host are done while keeping L3MODE HIGH. The devices with an L3 operational address differing from the issued one
must ignore these data transfers until the next operational address is issued. Only the device with an address equal to
the issued operational address performs the transfer.
The SAA2500 has the L3 operational address as shown in Table 13.
Table 13
L3 operational address.
Note
1.
The ‘Data Operation Mode’ bits DOM1 and DOM0 determine the mode in which the SAA2500 L3 interface will stay
until the next time an L3 operational address is issued (see Table 14).
7
6
5
4
3
2
1
0
0
1
1
0
0
0
DOM1
(1)
DOM0
(1)
Table 14
DOM1 and DOM0 bits.
Control bytes can be written to the SAA2500.
Data is transferred to or from the SAA2500 in so-called
data items. The items can be a readable or writeable type.
A data item transfer is initiated by writing the
corresponding control byte to the SAA2500 first. Next, the
DOM1
DOM0
TRANSFER TYPE
0
0
1
1
0
1
0
1
write item data
read item data
write control to SAA2500
read SAA2500 status
item data itself is transferred, always as an integer number
of bytes.
The status of the SAA2500 can be read via L3. The
SAA2500 status flag L3RDY must be monitored before
transferring data item bytes to avoid transferring bytes
faster than the L3 interface of the SAA2500 can handle.
L3
INTERFACE INITIALISATION AT AN
SAA2500
DEVICE RESET
Figure 15 shows the mandatory actions that must be taken
for correct L3 interface start-up at a device reset.
Fig.15 L3 interface initialisation procedure.
handbook, full pagewidth
RESET
L3MODE
L3CLK
1
2
3
MGB503
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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SAA2502 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:ISO/MPEG Audio Source Decoder