參數(shù)資料
型號: SA7026DH
廠商: NXP SEMICONDUCTORS
元件分類: XO, clock
英文描述: 1.3GHz low voltage fractional-N dual frequency synthesizer
中文描述: PLL FREQUENCY SYNTHESIZER, 1300 MHz, PDSO20
封裝: 4.40 MM, PLASTIC, SOT-360-1, TSSOP-20
文件頁數(shù): 3/18頁
文件大?。?/td> 299K
代理商: SA7026DH
Philips Semiconductors
Product specification
SA7026
1.3GHz low voltage fractional-N dual synthesizer
1999 Nov 04
3
V
DD
3
SR01496
CLOCK
DATA
STROBE
RFin+
RFin–
REFin+
REFin–
AUXin
TEST
LOAD SIGNALS
ADDRESS DECODER
2–BIT SHIFT
REGISTER
22–BIT SHIFT
REGISTER
CONTROL
LATCH
LATCH
MAIN DIVIDER
SM
REFERENCE
DIVIDER
2 2 2 2
LATCH
AMP
AMP
15
16
6
5
19
18
17
12
2
LATCH
AUX DIVIDER
PHASE
DETECTOR
PHASE
DETECTOR
COMP
PUMP
BIAS
PUMP
CURRENT
SETTING
13
V
DDCP
GND
4
SA
7, 10
GND
CP
R
SET
PHP
PHI
LOCK
PHA
14
8
9
1
11
PON
20
Figure 2.
Block Diagram
PINNING
SYMBOL
PIN
DESCRIPTION
LOCK
1
Lock detect output
TEST
2
Test (should be either grounded or
connected to V
DD
)
Digital supply
V
DD
GND
3
4
Digital ground
RFin+
5
RF input to main divider
RFin–
6
RF input to main divider
GND
CP
PHP
7
Charge pump ground
8
Main normal charge pump
PHI
9
Main integral charge pump
GND
CP
10
Charge pump ground
SYMBOL
PIN
DESCRIPTION
PHA
11
Auxiliary charge pump output
AUXin
12
Input to auxiliary divider
V
DDCP
R
SET
13
Charge pump supply voltage
14
External resistor from this pin to ground
sets the charge pump current
REFin–
15
Reference input
REFin+
16
Reference input
CLOCK
17
Programming bus clock input
DATA
18
Programming bus data input
STROBE
19
Programming bus enable input
PON
20
Power down control
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