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參數(shù)資料
| 型號： | SA7016DH |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | XO, clock |
| 英文描述： | 1.3GHz low voltage fractional-N synthesizer |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 1300 MHz, PDSO16 |
| 封裝： | PLASTIC, TSSOP-16 |
| 文件頁數(shù)： | 3/18頁 |
| 文件大?。?/td> | 232K |
| 代理商： | SA7016DH |
Philips Semiconductors
Product specification
SA7016
1.3GHz low voltage fractional-N synthesizer
1999 Nov 04
3
SR01506
CLOCK
DATA
STROBE
RFin+
RFin–
REF
in+
REF
in–
TEST
LOAD SIGNALS
ADDRESS DECODER
2–BIT SHIFT
REGISTER
22–BIT SHIFT
REGISTER
CONTROL
LATCH
LATCH
MAIN DIVIDER
REFERENCE
DIVIDER
LATCH
AMP
11
12
6
5
15
14
13
2
PHASE
DETECTOR
COMP
PUMP
BIAS
PUMP
CURRENT
SETTING
GND
4
7
3
GND
CP
V
DD
R
SET
V
DDCP
PHP
LOCK
10
9
8
1
PON
16
Figure 2.
Block Diagram
PINNING
SYMBOL
PIN
DESCRIPTION
LOCK
1
Lock detect output
TEST
2
Test (should be either grounded or
connected to V
DD)
V
DD
3
Digital supply
GND
4
Digital ground
RFin+
5
RF input to main divider
RFin–
6
RF input to main divider
GND
CP
7
Charge pump ground
PHP
8
Main normal chargepump
V
DDCP
9
Charge pump supply voltage
R
SET
10
External resistor from this pin to ground
sets the chargepump current
REFin–
11
Reference input
REFin+
12
Reference input
CLOCK
13
Programming bus clock input
DATA
14
Programming bus data input
STROBE
15
Programming bus enable input
PON
16
Power down control
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相關代理商/技術參數(shù) |
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| SA701D | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Divide by: 128/129-64/65 dual modulus low power ECL prescaler |
| SA701N | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Divide by: 128/129-64/65 dual modulus low power ECL prescaler |
| SA702 | 制造商:POLYFET 制造商全稱:Polyfet RF Devices 功能描述:SILICON GATE ENHANCEMENT MODE RF POWER VDMOS TRANSISTOR |
| SA702/DF9M | 制造商:Hirose 功能描述:903-4508-0-00 EACH 制造商:Hirose 功能描述:SA702/DF9M |
| SA702/DF9M(62) | 制造商:Hirose 功能描述:903-4508-0-62 EACH 制造商:Hirose 功能描述:SA702/DF9M(62) |
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