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參數(shù)資料
| 型號： | SA1620 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Low voltage GSM front-end transceiver(低壓GSM前端收發(fā)器) |
| 中文描述： | 低電壓的GSM前端收發(fā)器（低壓手機(jī)前端收發(fā)器） |
| 文件頁數(shù)： | 6/26頁 |
| 文件大?。?/td> | 203K |
| 代理商： | SA1620 |
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Philips Semiconductors
Product specification
SA1620
Low voltage GSM front-end transceiver
1997 May 22
6
Table 2.
DC Regulators
SYMBOL
PARAMETER
TEST
LIMITS
UNITS
CONDITIONS
MIN
TYP
MAX
V
BATT
VREG1,
VREG2
Common positive input voltage at both regulators
VREG1+0.3
V
Output voltages of regulators 1 and 2
V
BATT
= 3.3V
2.85
3
3.15
V
I
INT1
I
INT2
Internal current of REG1 in power-on mode
4 + I
VREG1
/10
2.5 + I
VREG2
/10
<15
mA
Internal current of REG2 in power-on mode
mA
I
INT01
, I
INT02
I
VREG1MAX5
I
VREG2MAX5
Internal current in power-down mode
μ
A
Max output current at VREG1
100
mA
Max output current at VREG2
30
mA
V
BATT
= 3.3V, I
REG1
= 0.1mA
V
BATT
= 3.3V, I
REG1
= 100mA
V
BATT
= 7.5V, I
REG1
= 100mA
≤
100kHz
0.03
BW
6
60
kHz
80
≤
–61
F
REG7
f
10MHz
≤
–32
≤
–37
≤
–48
dB
100MHz
400MHz
NOTES:
1. Power-on pin of Regulator 1 and 2: PON
2. Input currents at PON: <1
μ
A. There are no pull-up or pull-down resistors.
3. Feedthrough attenuation from the logic input PON to the outputs VREG1 and VREG2:
≥
40dB.
4. Recommended load capacitors: C529 = C530 = 1
μ
F to ground with series resistance
≤
0.1
.
See Figure 4. Additional optional capacitor
≤
1000
μ
F with series resistance
≤
5
.
5. At T
j
≥
150
°
C a thermal switch reduces the output current.
6. Typical open loop bandwidths of regulator 1 at V
REG1
= 3V and C529 = 1
μ
F.
7. Feedthrough attenuation (at the indicated frequency f) from the input V
BATT
to the outputs V
REG1
and V
REG2
at V
BATT
= 3.3V,
(CON1=CON2=L)
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