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參數(shù)資料
| 型號： | S71WS512N80BAWZZ3 |
| 廠商： | Spansion Inc. |
| 英文描述： | Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| 中文描述： | 堆疊式多芯片產(chǎn)品（MCP）的閃存和移動存儲芯片的CMOS 1.8伏特 |
| 文件頁數(shù)： | 38/142頁 |
| 文件大?。?/td> | 1996K |
| 代理商： | S71WS512N80BAWZZ3 |
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38
S29WSxxxN MirrorBit Flash Family For Multi-chip Products (MCP)
S71WS512NE0BFWZZ_00_ A1 June 28, 2004
A d v a n c e I n f o r m a t i o n
through
Table 11
within that bank. All reads outside of the CFI address range,
within the bank, will return non-valid data. Reads from other banks are allowed,
writes are not. To terminate reading CFI data, the system must write the reset
command.
The system can also write the CFI query command when the device is in the au-
toselect mode. The device enters the CFI query mode, and the system can read
CFI data at the addresses given in
Table 8
through
Table 11
. The system must
write the reset command to return the device to the autoselect mode.
For further information, please refer to the CFI Specification and CFI Publication
100. Please contact your sales office for copies of these documents.
Not supported due to page programming requirement
Table 8. CFI Query Identification String
Addresses
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
Data
0051h
0052h
0059h
0002h
0000h
0040h
0000h
0000h
0000h
0000h
0000h
Description
Query Unique ASCII string “QRY”
Primary OEM Command Set
Address for Primary Extended Table
Alternate OEM Command Set (00h = none exists)
Address for Alternate OEM Extended Table (00h = none exists)
Table 9. System Interface String
Addresses
Data
Description
1Bh
0017h
V
CC
Min. (write/erase)
DQ7–DQ4: volt, DQ3–DQ0: 100 millivolt
V
CC
Max. (write/erase)
DQ7–DQ4: volt, DQ3–DQ0: 100 millivolt
V
PP
Min. voltage (00h = no V
PP
pin present)
V
PP
Max. voltage (00h = no V
PP
pin present)
Typical timeout per single byte/word write 2
N
μs
(Note )
Typical timeout for Min. size buffer write 2
N
μs (00h = not supported)
(Note )
Typical timeout per individual block erase 2
N
ms
Typical timeout for full chip erase 2
N
ms (00h = not supported)
Max. timeout for byte/word write 2
N
times typical
(Note )
Max. timeout for buffer write 2
N
times typical
(Note )
Max. timeout per individual block erase 2
N
times typical
Max. timeout for full chip erase 2
N
times typical (00h = not supported)
1Ch
0019h
1Dh
1Eh
1Fh
20h
21h
22h
23h
24h
25h
26h
0000h
0000h
0005h
0009h
0008h
0000h
0003h
0001h
0003h
0000h
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| S71WS512N80BFEZZ0 | Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S71WS512N80BFEZZ0 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BFEZZ2 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BFEZZ3 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BFIZZ0 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
| S71WS512N80BFIZZ2 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt |
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