參數(shù)資料
型號(hào)： S70WS512N00BFWAA0
廠商： Spansion Inc.
英文描述： Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory
中文描述： 同硅晶片堆疊多芯片產(chǎn)品（MCP）的512兆位（32兆× 16位）的CMOS 1.8伏，只有同時(shí)讀/寫，突發(fā)模式閃存
文件頁數(shù)： 41/93頁
文件大?。?/td> 846K
代理商： S70WS512N00BFWAA0
42
S70WS512N00 Based MCPs
S70WS512N00_00_A0 March 14, 2005
A d v a n c e I n f o r m a t i o n
If the system asserts V
HH
on this input, the device automatically enters the aforementioned Un-
lock Bypass mode and uses the higher voltage on the input to reduce the time required for
program and erase operations. The system can then use the Write Buffer Load command se-
quence provided by the Unlock Bypass mode. Note that if a
Write-to-Buffer-Abort Reset
is
required while in Unlock Bypass mode, the full 3-cycle RESET command sequence must be used
to reset the device. Removing V
HH
from the ACC input, upon completion of the embedded pro-
gram or erase operation, returns the device to normal operation.
Sectors must be unlocked prior to raising ACC to V
HH
.
The ACC pin must not be at V
HH
for operations other than accelerated programming and ac-
celerated chip erase, or device damage may result.
The ACC pin must not be left floating or unconnected; inconsistent behavior of the device may
result.
ACC locks all sector if set to V
IL
. ACC should be set to V
IH
for all other conditions.
8.5.8
Unlock Bypass
The device features an Unlock Bypass mode to facilitate faster word programming. Once the de-
vice enters the Unlock Bypass mode, only two write cycles are required to program data, instead
of the normal four cycles.
This mode dispenses with the initial two unlock cycles required in the standard program command
sequence, resulting in faster total programming time. See the
Appendix
for the requirements for
the unlock bypass command sequences.
During the unlock bypass mode, only the Read, Unlock Bypass Program and Unlock Bypass Reset
commands are valid. To exit the unlock bypass mode, the system must issue the two-cycle unlock
bypass reset command sequence. The first cycle must contain the bank address and the data 90h.
The second cycle need only contain the data 00h. The bank then returns to the read mode.
相關(guān)PDF資料
PDF描述
S70WS512N00BFWAA3 Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory
S70WS512N00BFWAB0 Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory
S70WS512N00BFWAB2 Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory
S70WS512N00BFWAB3 Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory
S71AL016D Stacked Multi-Chip Product (MCP) Flash Memory and RAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S70WS512N00BFWAA2 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory
S70WS512N00BFWAA3 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory
S70WS512N00BFWAB0 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory
S70WS512N00BFWAB2 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory
S70WS512N00BFWAB3 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory
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