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參數(shù)資料
| 型號(hào)： | S70WS512N00BAWAA3 |
| 廠商： | Spansion Inc. |
| 英文描述： | Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory |
| 中文描述： | 同硅晶片堆疊多芯片產(chǎn)品（MCP）的512兆位（32兆× 16位）的CMOS 1.8伏，只有同時(shí)讀/寫，突發(fā)模式閃存 |
| 文件頁(yè)數(shù)： | 69/93頁(yè) |
| 文件大?。?/td> | 846K |
| 代理商： | S70WS512N00BAWAA3 |
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70
S70WS512N00 Based MCPs
S70WS512N00_00_A0 March 14, 2005
A d v a n c e I n f o r m a t i o n
Notes:
1.
Figure shows total number of wait states set to seven cycles. The total number of wait states can be programmed from
two cycles to seven cycles.
2.
If any burst address occurs at
address + 1
,
address + 2
, or
address + 3
, additional clock delay cycles are inserted, and
are indicated by RDY.
3.
The device is in synchronous mode with wrap around.
4.
D8–DF in data waveform indicate the order of data within a given 8-word address range, from lowest to highest. Starting
address in figure is the 4th address in range (0-F).
Figure 12.8 8-word Linear Burst with Wrap Around
Notes:
1.
Figure shows total number of wait states set to seven cycles. The total number of wait states can be programmed from
two cycles to seven cycles. Clock is set for active rising edge.
2.
If any burst address occurs at
address + 1
,
address + 2
, or
address + 3
, additional clock delay cycles are inserted, and
are indicated by RDY.
3.
The device is in asynchronous mode with out wrap around.
4.
DC–D13 in data waveform indicate the order of data within a given 8-word address range, from lowest to highest.
Starting address in figure is the 1st address in range (c-13).
Figure 12.9 8-word Linear Burst without Wrap Around
DC
DD
OE#
Data
Addresses
Ac
AVD#
RDY
CLK
CE#
t
CES
t
ACS
t
AVC
t
AVD
t
ACH
t
OE
t
IACC
t
AOE
t
BDH
DE
DF
DB
7 cycles for initial access shown.
Hi-Z
t
RACC
1
2
3
4
5
6
7
t
RDYS
t
BACC
t
CR
D8
t
RACC
DC
DD
OE#
Data
Addresses
Ac
AVD#
RDY
CLK
CE#
t
CES
t
ACS
t
AVC
t
AVD
t
ACH
t
OE
t
IACC
t
BDH
DE
DF
D13
Hi-Z
t
RACC
1
2
3
4
5
6
7
t
RDYS
t
BACC
t
CR
D10
t
RACC
t
AOE
7 cycles for initial access shown.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S70WS512N00BAWAB0 | Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory |
| S70WS512N00BAWAB2 | Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory |
| S70WS512N00BAWAB3 | Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory |
| S70WS512N00BFWA20 | Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory |
| S70WS512N00BFWA22 | Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S70WS512N00BAWAB0 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory |
| S70WS512N00BAWAB2 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory |
| S70WS512N00BAWAB3 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory |
| S70WS512N00BFWA20 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory |
| S70WS512N00BFWA22 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Same-Die Stacked Multi-Chip Product (MCP) 512 Megabit (32M x 16 bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst-mode Flash Memory |
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