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參數(shù)資料
| 型號： | S3P863A |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | S3C8639/C863A/P863A MICROCONTROLLERS |
| 中文描述： | S3C8639/C863A/P863A微控制器 |
| 文件頁數(shù)： | 6/23頁 |
| 文件大小： | 169K |
| 代理商： | S3P863A |
PRODUCT OVERVIEW
S3C8639/C863A/P863A
1-6
PIN DESCRIPTIONS
Table 1-1. S3C8639/C863A Pin Descriptions
Pin
Names
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
Pin
Type
I/O
Pin
Description
Circuit
Type
D-1
D-1
D-1
D-1
D-1
D-1
D-1
D-1
SDIP Pin
Numbers
1
2
3
4
5
6
7
8
Shared
Functions
INT0
INT1
INT2
General-purpose, 8-bit I/O port. Shared
functions include three external interrupt inputs
and I/O for timer M0. Selective configuration of
port 0 pins to input or output mode is
supported.
TM0CAP
P1.0
P1.1
P1.2
I/O
General-purpose, 8-bit I/O port. Selective
configuration is available for port 1 pins to
input, push-pull output, n-channel open-drain
mode, or IIC-bus clock and data I/O.
E-1
E-1
E-1
9
10
19
SDA1
SCL1
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
I/O
General-purpose, 8-bit I/O port Selective
configuration of port 2 pins to input or output
mode is supported. The port 2 pin circuits are
designed to push-pull PWM output and Csync
(SOG) signal input.
D-1
D-1
D-1
D-1
E-1
E-1
E-1
D-1
20
21
22
23
24
25
26
32
PWM0
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
Csync-I
P3.0–P3.3
P3.4–P3.7
I/O
General-purpose, 8-bit I/O port Selective
configuration port 3 pins to input or output
mode is supported. Multiplexed for alternative
use as A/D converter inputs AD0–AD3.
E-1
E
35–38
39–42
AD0–AD3
Hsync-I
Vsync-I
Clamp-O
Hsync-O
Vsync-O
SDA0
SCL0
V
DD1
, V
SS1
,
V
DD2
, V
SS2
X
IN
, X
OUT
I
I
O
O
O
I/O
I/O
The pins are sync processor signal I/O and IIC-
bus clock and data I/O.
A-3
A-3
A
A
A
G-3
G-3
31
30
27
28
29
16
17
–
–
Power pins
–
–
11, 12
34, 33
–
–
System clock I/O pins
–
14, 13
–
RESET
TEST
I
System
RESET
pin
B
18
–
I
Factory test pin input
0 V: Normal operation
, 5 V: Factory test mode
–
15
–
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