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參數(shù)資料
| 型號(hào)： | S3056 |
| 廠商： | Applied Micro Circuits Corp. |
| 英文描述： | Multi-Rate SONET/SDH Clock Recovery Unit(多速率SONET/SDH時(shí)鐘恢復(fù)單元) |
| 中文描述： | 多速率SONET / SDH時(shí)鐘恢復(fù)單元（多速率SONET / SDH的時(shí)鐘恢復(fù)單元） |
| 文件頁(yè)數(shù)： | 1/17頁(yè) |
| 文件大?。?/td> | 152K |
| 代理商： | S3056 |
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S3056
S3056
BiCMOS PECL CLOCK GENERATOR
October 31, 2000 / Revision J
DEVICE
SPECIFICATION
FEATURES
SiGe BiCMOS technology
Complies with Bellcore and ITU-T specifica-
tions for jitter tolerance, jitter transfer and
jitter generation
On-chip high frequency PLL with internal
loop filter for clock recovery
Supports clock recovery for:
OC-48 (2488.32 Mbps),
Fibre Channel (2125 Mbps),
OC-24 (1244.16 Mbps),
Gigabit Ethernet (1250 Mbps),
Fibre Channel (1062.5 Mbps),
OC-12 (622.08 Mbps),
OC-3 (155.52 Mbps)
NRZ data
Selectable reference frequencies
19.44 MHz or 155.52 MHz
(or equivalent Fibre Channel/
Gigabit Ethernet frequencies)
Lock detect—monitors frequency of
incoming data
Low-jitter serial interface
+3.3 V supply
Compact 48 pin TQFP TEP package
Typical power 620 mW
GENERAL DESCRIPTION
The function of the S3056 clock recovery unit is to
derive high speed timing signals for SONET/SDH-
based equipment. The S3056 is implemented using
AMCC’s proven Phase Locked Loop (PLL) technology.
Figure 1 shows a typical network application.
The S3056 receives an OC-48, OC-24, OC-12, OC-3,
Fibre Channel or Gigabit Ethernet scrambled NRZ sig-
nal and recovers the clock from the data. The chip
outputs a differential bit clock and retimed data.
The S3056 utilizes an on-chip PLL which consists
of a phase detector, a loop filter, and a Voltage
Controlled Oscillator (VCO). The phase detector
compares the phase relationship between the VCO
output and the serial data input. A loop filter con-
verts the phase detector output into a smooth DC
voltage, and the DC voltage is input to the VCO
whose frequency is varied by this voltage. A block
diagram is shown in Figure 2.
Figure 1. System Block Diagram
N
P
N
P
S3057
S3057
OTX
ORX
OTX
ORX
16
16
16
16
S3056
S3056
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S3057 | Multi-Rate SONET/SDH/ATM Transceiver(帶片上鎖相環(huán)的多速率SONET/SDH/ATM收發(fā)器) |
| S3059 | Multi-Rate SONET/SDH/ATM Transceiver(帶片上鎖相環(huán)的多速率SONET/SDH/ATM收發(fā)器) |
| S3062 | MULTIRATE (OC-48/24/12/3/GBE/FC) SONET/SDH/ATM TRANSCEIVER w/ FEC |
| S3062TB-156TBGA20 | MULTIRATE (OC-48/24/12/3/GBE/FC) SONET/SDH/ATM TRANSCEIVER w/ FEC |
| S3067 | MULTIRATE (OC-48/24/12/3/GBE/FC) SONET/SDH/ATM TRANSCEIVER w/ FEC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S3056TT | 制造商:AppliedMicro 功能描述:CLOCK RECOVERY CIRCUIT, PQFP48 |
| S3057 | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:5CH BTL Motor Drive IC |
| S3057TB | 制造商:AppliedMicro 功能描述: |
| S3057TB20 | 制造商:AppliedMicro 功能描述: |
| S3058 | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:5CH BTL Motor Drive IC |
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