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參數(shù)資料
| 型號： | S3045 |
| 廠商： | APPLIEDMICRO INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | SONET/SDH OC-12 to OC-48 Mux/Demux(SONET/SDH多路轉(zhuǎn)換器/多路分解器) |
| 中文描述： | MUX/DEMUX, PQFP208 |
| 封裝： | TEP-208 |
| 文件頁數(shù)： | 2/30頁 |
| 文件大?。?/td> | 699K |
| 代理商： | S3045 |
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S3045
SONET/SDH OC-12 TO OC-48 MUX/DEMUX
March 12, 2001 / Revision F
S3045 OVERVIEW
The S3045 byte interleave chip implements SONET/
SDH byte interleave functions required to multiplex/
demultiplex four STS-12/STM-4 data streams into a
single STS-48/STM-16 data stream. Each of the four
STS-12/STM-4 transmit/receive data streams uses
an 8-bit parallel interface with parity to maintain com-
patibility with industry standard network interface
processors. The STS-48/STM-16 data stream uses
an 8-bit parallel LVDS data path to be compatible
with the S3041/S3042 Mux/Demux chipset. The
block diagram in Figure 2 shows the basic operation
of the chip. This chip can be used with the S3041
and S3042 to implement the front end of SONET
equipment. The chip includes byte interleave cir-
cuitry along with B1 calculation, M1 calculation, J0/
Z0 insertion, and B1 verification circuitry. STS-48/
STM-16 data stream is monitored in the receive path
for OOF and LOS, and alarm outputs are generated.
The S3045 is divided into a transmitter section and a
receiver section. The sequence of operation is as
follows:
Transmitter Operations
1. 32-bit LVTTL parallel input from four 8-bit STS-
12/ STM-4 data streams (PIN A,B,C,D) with parity
(PARIN A,B,C,D).
2. Four Byte interleave conversion Mux.
3. Section-trace insertion (J0/Z0).
4. M1 calculation (addition of four STS-12/STM-4
M1 values) and insertion into the number one
STS-12/STM-4 location.
5. M1 insertion of zero into STS-12/STM-4 number
two, three, and four locations.
6. Four B2 parity byte calculations and insertions for
STS-1 frames after M1 insertions.
7. Frame synchronous scrambling.
8. B1 calculation and insertion.
9. STS-48/STM-16 compatible 8-bit wide 311 MHz
LVDS output (311DATOUT).
Receiver Operations
1. STS-48/STM-16 compatible 8-bit wide 311 MHz
LVDS input (311DATIN).
2. OOF and LOS states are monitored and alarms
are generated.
3. B1 extraction and calculation of the STS-48/STM-16
frame.
4. B1 calculation of the number one STS-12/STM-4
frame.
5. Frame synchronous descrambling.
6. B1 compare and error indication (B1ERR) genera-
tion for the STS-48/STM-16 frame.
7. Insert the number one STS-12/STM-4 B1 parity byte
into the number one STS-12/STM-4 frame and insert
errors if any found in the STS-48/STM-16 B1 parity
byte.
8. 32-bit (4 x 8 bit) parallel output of four STS-12/
STM-4 data streams (POUT A,B,C,D) with parity
output (PAROUT A,B,C,D).
Suggested Interface Devices
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BER
–
Bit Error rate
CDR
–
Clock and Data Recovery
LOS
–
Loss Of Signal
OOF
–
Out Of Frame
ORX
–
Optical Receiver
OTX
–
Optical Transmitter
S3045 Acronym List
SDH
–
Synchronous Digital Heirarchy
SEF
–
Severely Errored Frame
SONET
–
Synchronous Optical Network
STM
–
Synchronous Transport Module
STS
–
Synchronous Transport Signal
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| S3055 | SONET/SDH/ATM OC-48 16 Bit Transceiver with CDR(SONET/SDH 帶CDR的16位收發(fā)器（完全集成OC-48接口器件）) |
| S3056 | Multi-Rate SONET/SDH Clock Recovery Unit(多速率SONET/SDH時鐘恢復(fù)單元) |
| S3057 | Multi-Rate SONET/SDH/ATM Transceiver(帶片上鎖相環(huán)的多速率SONET/SDH/ATM收發(fā)器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S3045B | 制造商:AppliedMicro 功能描述: |
| S30460 | 制造商:Microsemi Corporation 功能描述:Diode 600V 40A 2-Pin DO-5 制造商:Microsemi Corporation 功能描述:600V 40A 2PIN DO-5 - Bulk |
| S30480 | 制造商:Microsemi Corporation 功能描述:800V 40A 2PIN DO-5 - Bulk |
| S304-99-112-47-010200 | 制造商:Mill-Max Mfg Corp 功能描述: |
| S304AB | 制造商:Cinch Connectors 功能描述:Conn Wire to Board SKT 4 POS Solder Lug ST Panel Mount |
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