- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄192292 > S1M8660AX01-F0T0 SPECIALTY TELECOM CIRCUIT, CBCC48 PDF資料下載
參數(shù)資料
| 型號： | S1M8660AX01-F0T0 |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | SPECIALTY TELECOM CIRCUIT, CBCC48 |
| 封裝： | 7 X 7 MM, BCC-48 |
| 文件頁數(shù)： | 28/32頁 |
| 文件大?。?/td> | 270K |
| 代理商： | S1M8660AX01-F0T0 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁當(dāng)前第28頁第29頁第30頁第31頁第32頁
RX IF/BBA WITH GPS
S1M8660A (Preliminary)
5
PIN DESCRIPTION (Continued)
Pin No
Symbol
I/O
Description
32
SLEEPB/CLK
DI
When SEN is high, this pin inputs the clock with the permit of the 3-
line serial control input. When SEN is low, parallel control input is
allowed and this pin performs SLEEPB. If this pin is opened, it
remains at Low.
36
TCXO
AI
Reference frequency input terminal connected to the VCTCXO output.
When this pin stops, only DC bias is delivered to maintain the DC
charge value of the capacitor connected externally.
37
TCXO/N
DO
Division output of the TCXO Reference frequency input. 3-different
division ratio and 2- output drive capacities can be selected through
the SPI bus control. Default : 4.92MHz, Weak OUT *division ratio : 1,
1/4, 1/16
38
CHIPx8
BI
CHIPx8 CLOCK output terminal. It has a division ratio of 512/1025 for
the TCXO reference frequency.
Therefore, it cannot have a perfect 50% duty. When this terminal is
not used (CDMA SLEEP, FM IDLE), it remains at Low. This pin can
be used exclusively for the externally generated CHIPx8 CLOCK input
using the SPI BUS control.
39
40
41
42
45
46
47
48
RXQD3
RXQD2
RXQD1
RXQD0
RXID3
RXID2
RXID1/FMRID
RXID0/FMRQD
DO
CDMA A-D Converter's digital outputs, which are connected to the
modem data input pins. These data are synchronized at CHIP
×8's
rising edge and output. Because they are valid at the falling edge, the
data are latched at the falling edge in the modem.
Because the number of 48-pins are restricted in this product, pins 47
and 48 are shared with the FMDATA pin.
4, 6,
14,
15, 17,
20, 24
VDDA
AI
Power input terminal for the analog circuit.
35
VDDD
DI
Power for the digital logic.
44
VDDM
DI
Power source for a logic circuit, related to the digital input /output,
connected to an external digital logic such as the modem.
3, 5, 8,
13, 16,
18, 19,
23, 43
GND
AI
Analog circuit ground.
Pin-18 is N.C. in the product.
34
GNDD
DI
Digital logic circuit ground.
33
NC
-
This pin is used for internal testing only and is not connected to
anything.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S1M8836X01-G0T0 | PLL FREQUENCY SYNTHESIZER, 1000 MHz, CQCC24 |
| S1P-SLV | 1 CONTACT(S), FEMALE, TWO PART BOARD CONNECTOR, CRIMP |
| S1T0567X01-D0B0 | TELECOM, TONE DECODER CIRCUIT, PDIP8 |
| S1U2-12-RC | 500 MHz - 2000 MHz RF/MICROWAVE SGL POLE SGL THROW SWITCH, 1.5 dB INSERTION LOSS |
| S2004VS2 | 4 A, 200 V, SCR, TO-251 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S1M8662A | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:CDMA/PCS/GPS Triple Mode IF/ baseband IC |
| S1M8662AX01-F0T0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:CDMA/PCS/GPS Triple Mode IF/ baseband IC |
| S1M8821 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:INTERGER RF/IF DUAL PLL |
| S1M8821X01-R0T0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:INTERGER RF/IF DUAL PLL |
| S1M8822 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:INTERGER RF/IF DUAL PLL |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。