參數(shù)資料
型號(hào): S-7750C71XX-HCT1
元件分類: 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PBGA16
封裝: 1.93 X 2.07 MM, 0.6 MM HEIGHT, LEAD FREE, WLP-16
文件頁數(shù): 43/44頁
文件大?。?/td> 563K
代理商: S-7750C71XX-HCT1
PROGRAMMABLE PORT CONTROLLER (PORT EXPANDER WITH BUILT-IN E2PROM CIRCUIT)
S-7750C
Rev.2.0_00
Seiko Instruments Inc.
8
AC Electrical Characteristics
Table 8 Measurement Conditions
Input pulse voltage
VIL = 0.1
×VCCH, VIH = 0.9×VCCH
Rising / falling time of input pulse
20 ns
Output reference voltage
0.5
×VCCH
Output load
100 pF
+ Pull-up resistor 1.0 kΩ
SDA
C = 100 pF
VCCH
R = 1.0 k
Ω
Figure 7 Output Load Circuit
Table 9 AC Electrical Characteristics
VCCH
= 2.3 to 4.5 V
Item
Symbol
Min.
Max.
Unit
SCL clock frequency
*1
fSCL
0
400
kHz
SCL clock time “L”
*1
tLOW
1.0
μs
SCL clock time “H”
*1
tHIGH
0.9
μs
SDA output delay time
*1
tAA
0.9
μs
SDA output hold time
*1
tDH
50
ns
Start condition setup time
*1
tSU.STA
0.6
μs
Start condition hold time
*1
tHD.STA
0.6
μs
Data input setup time
*1
tSU.DAT
100
ns
Data input hold time
*1
tHD.DAT
0
ns
Stop condition setup time
*1
tSU.STO
0.6
μs
SCL, SDA rise time
*1
tR
0.3
μs
SCL, SDA fall time
*1
tF
0.3
μs
Bus release time
*1
tBUF
1.3
μs
Noise suppression time
tI
50
ns
Frequency for external oscillation input
*2
fTEX
400
kHz
*1.
The timing is defined by 10% and 90% of the waveform.
*2.
When selecting the option for external oscillation input.
SCL
SDA IN
SDA OUT
tBUF
tR
tSU.STO
tSU.DAT
tHD.DAT
tDH
tAA
tHIGH
tLOW
tHD.STA
tSU.STA
tF
Figure 8 Bus Timing
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