參數(shù)資料
型號: S-7750C71XX-HCT1
元件分類: 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PBGA16
封裝: 1.93 X 2.07 MM, 0.6 MM HEIGHT, LEAD FREE, WLP-16
文件頁數(shù): 21/44頁
文件大?。?/td> 563K
代理商: S-7750C71XX-HCT1
PROGRAMMABLE PORT CONTROLLER (PORT EXPANDER WITH BUILT-IN E2PROM CIRCUIT)
S-7750C
Rev.2.0_00
Seiko Instruments Inc.
28
4. 2 Initialization time
The S-7750C initializes at the same time when the power supply voltage is raised. Input instructions to the S-7750C
after initialization. The S-7750C does not accept any instruction during initialization.
Figure 34
shows the initialization time of the S-7750C.
(Condition : VCCH = 3.0 V, Ta = 25°C)
Rise time (tRISE)
[s]
S-7750C initialization
time (tINIT) Max.
[s]
100 m
10 m
1.0 m
100
μ
10
μ
1.0
μ
1.0
μ 10 μ 100 μ 1.0 m 10 m 100 m
Figure 34 Initialization Time
5. Data hold time (tHD. DAT
= 0 ns)
If SCL and SDA of the S-7750C are changed at the same time, the timing which takes to reach the S-7750C slightly
lags due to a load on the bus line. As a result, the change in the SDA precedes a falling edge of SCL so that S-7750C
may recognize a start/stop condition.
To avoid this, in the S-7750C, it is recommended to set the delay time of over 0.3
μs for a falling edge of SCL.
In its specs, it is described as the S-7750C works at 0 ns of data hold time, however, take account into the above
action in actual use.
SCL
SDA
tHD. DAT = 0.3
μs Min.
Figure 35 Data Hold Time
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