參數(shù)資料
型號: S-29355A
廠商: Seiko Instruments Inc.
英文描述: CMOS 4Kbit Serial EEPROM(4K位 CMOS 串行EEPROM)
中文描述: 4Kbit的CMOS串行EEPROM(4K的位的CMOS串行EEPROM的)
文件頁數(shù): 6/40頁
文件大?。?/td> 166K
代理商: S-29355A
CMOS 2K/4K-bit SERIAL E
2
PROM
S-29255A/29355A
Seiko Instruments Inc.
5
Operation
For each instraction, input op code, address and data per Table 1. After CS goes from “H” to “L”, DI is latched, synchronized with
the rise of SK. After the entire data is latched, the instructions input can be completed by changing CS to “H”. Even after
changing CS to low, instructions can not be latched by inputting a pulse to SK while DI remains low.
NOTE: Between instructions, CS must be “H” during t
CDS.
1.
Read mode (READ)
The READ instruction reads data from the specified address.
Through the READ instruction, the op code and address are latched, synchronized with the rise of SK. At the falling edge of the
16th SK clock cycle from the start bit, (and all of the addresses are input), DO changes from high impedance (Hi-Z) status to data
output status, and data is output, synchronized with the fall of SK.
2.
Write mode (PROGRAM, WRAL, and ERAL)
There are three write instructions, PROGRAM, WRAL, and ERAL. Each write instruction automatically starts the write operation
to nonvolatile memory after completing the specified clock input. The write operation is completed in 10 ms (tPR max.) , and the
average write period is 4 to 5 ms.
The S-29255A/29355A offer the following two methods to check the completion of the write operation to choose the shortest
writing cycle.
By reading the status of the RDY/BUSY output pin
While the write operation is continued, low level is output. And when the write operation is completed, high level is output.
By reading the status output signal
After inputting a write instruction, a status output instruction must be performed (for the status output instruction, refer to “4.
Status output”) .
NOTE:
After starting the write operation, CS need not be “H”.
During the write operation, no instruction can be accepted except for status output. When using SK or DI during the
write operation, the SK and DI signals should not be a status output instruction, or, CS must be “H”.
The write operation can be performed when the RESET pin is at “L”. After RESET is “H”, even during write
operation, the write operation is terminated, and data is unstable. Therefore, when writing is not performed, fix the
RESET pin at “H” to inhibit all write operation and to avoid erroneous writing.
When the status output instruction is input after the write instruction, CS need not be “H”.
*
A7
0
0
0
A6
17
16
15
14
13
12
4
2
1
t
HZ
D0
D14
11
10
9
8
7
6
5
CS
D15
SK
DI
DO
A0
A5
A4
A3
A2
A1
31
32
3
0
1
1
0
1
* "L" for S-29255A.
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