參數(shù)資料
型號(hào)： RTL8201BL
廠商： Electronic Theatre Controls, Inc.
英文描述： REALTEK SINGLE CHIP SINGLE PORT 10/100M FAST ETHERNET PHYCEIVER RTL8201BL
中文描述： 瑞昱單片單端口10/100M自適應(yīng)快速以太網(wǎng)PHYCEIVER RTL8201BL
文件頁數(shù)： 15/29頁
文件大?。?/td> 335K
代理商： RTL8201BL
RTL8201BL
2002-03-29
Rev.1.2
15
management interface follows.
Write Cycle
Read Cycle
Preamble
32 contiguous logic '1's sent by the MAC on MDIO along with 32 corresponding cycles on MDC. This
provides synchronization for the PHY.
Start of Frame. Indicated by a 01 pattern.
Operation code. Read = 10. Write = 01.
PHY Address. Up to 31 PHYs can be connected to one MAC. This 5 bit field selects which PHY the frame is
directed to.
Register Address. This is a 5 bit field that selects which one of the 32 registers of the PHY this operation refers to.
Turnaround. This is a two bit time spacing between the register address and the data field of a frame to avoid
contention during a read transaction. For a read transaction, both the STA and the PHY shall remain in a
high-impedance state for the first bit time of the turnaround. The PHY shall drive a zero bit during the second
bit time of the turnaround of a read transaction.
Data. These are the 16 bits of Data.
Idle Condition, not actually part of the management frame. This is a high impedance state. Electrically, the
PHY's pull-up resistor will pull the MDIO line to a logic one.
ST
OP
PHYAD
REGAD
TA
DATA
IDLE
7.2 Auto-negotiation and Parallel Detection
The RTL8201BL supports IEEE 802.3u clause 28 Auto-negotiation operation which can cooperate with other transceivers
supporting auto-negotiation. By this mechanism, the RTL8201BL can auto detect the link partner’s ability and determine the
highest speed/duplex configuration and transmit/receive in this configuration. If the link partner does not support
Auto-negotiation, then the RTL8201BL will enable half duplex mode and enter parallel detection. The RTL8201BL will
default to transmit FLP and wait for the link partner to respond. If the RTL8201BL receives FPL, then the auto-negotiation
process will go on. If it receives NLP, then the RTL8201BL will change to 10Mbps and half duplex mode. If it receives a
100Mbps IDLE pattern, it will change to 100Mbps and half duplex mode.
To enable the auto-negotiation mode operation on the RTL8201BL, just pull the ANE pin high. And the SPEED pin and
DUPLEX pin will set the ability content of auto-negotiation register. The auto-negotiation mode can be externally disabled by
pulling the ANE pin low. In this case, the SPEED pin and DUX pin will change the media configuration of the RTL8201BL.
Below is a list for all configurations of the ANE/SPEED/DUPLEX pins and their operation in Fiber or UTP mode.
Select Medium type and interface mode to MAC
FX
(pin 24)
L
L
H
MII/SNIB
(pin 44)
H
L
X
Operation mode
UTP mode and MII interface
UTP mode and SNI interface
Fiber mode and MII interface
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
RTL8201BL-LF 制造商:Realtek Semiconductor 功能描述:
RTL8201CP 制造商:Realtek 功能描述:10M/100M
RTL8201CP-LF 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SINGLE-CHIP/SINGLE-PORT 10/100M FAST ETHERNET PHYCEIVER (With Auto Crossover)
RTL8201CP-VD 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SINGLE-CHIP/SINGLE-PORT 10/100M FAST ETHERNET PHYCEIVER (With Auto Crossover)
RTL8201CP-VD-LF 制造商:WIZnet Co Ltd 功能描述:Physical I/F Chip+Auto-Crossover,Realtek 制造商:Realtek Semiconductor 功能描述: 制造商:WIZnet Co Ltd 功能描述:IC,RTL8201CP-VD-LF 制造商:WIZNET INC 功能描述:IC,RTL8201CP-VD-LF
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