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參數(shù)資料
| 型號(hào)： | RSLIC18 |
| 廠商： | Intersil Corporation |
| 英文描述： | () |
| 中文描述： | （） |
| 文件頁數(shù)： | 3/10頁 |
| 文件大?。?/td> | 115K |
| 代理商： | RSLIC18 |
4-3
SPICE Macromodel Analysis
The SPICE macromodel represents entire the AC loop of the
device. Of the five functional blocks only the receiver is not
modeled. The receiver does not contribute significantly to the
device bandwidth and is modeled as an ideal current mirror.
The four core amplifiers of the design are modeled by two or
three pole circuits using voltage controlled voltage sources.
Low frequency effects of the loop current limit function are
included in the model but will not be discussed in detail. The
SPICE net list included at the end of the document should be
compatible with any SPICE compatible simulation software.
Model Diagram
The macromodel diagram of Figure 6 is very similar to the
functional diagram of Figure 1. The only differences are the
addition of the DC loop current limit function and generic
blocks representing the amplifiers. The current mirror is
modeled using a generic current controlled current source.
AMPLIFIER MODELS
The primary amplifier blocks of the architecture are the tip,
ring, sense and transmit amplifiers. Each amplifier will be
discussed separately followed by simulation examples using
the model.
Tip Amplifier
The Tip amplifier is modeled with a three pole circuit. The
open loop gain is 49740 or 94dB and the open loop 3dB
5.2pF in parallel with the feedback resistor of 200k
forms a
zero in the amplifier response at 153kHz. The model for the
Tip amplifier is shown below. The non inverting input is
indicated by (+), the inverting input by (-) and the output by (o).
Ring Amplifier
The Ring amplifier is modeled with a three pole circuit. The
open loop gain is 59420 or 95dB and the open loop 3dB
bandwidth is 12Hz. An internal compensation capacitor of
8pF in parallel with the feedback resistor of 200k
forms a
zero in the amplifier response at 100kHz. The model for the
Ring amplifier is shown below. The non inverting input is
indicated by (+), the inverting input by (-) and the output by (o).
FIGURE 4. TIP AMPLIFIER 3-POLE MODEL
+
-
+
-
+
-
+
-
G = 1
+
-
+
-
G = 1
+
-
+
-
G = 1
11.9G
56K
55K
132K
1p
1p
1p
G = 49740
5.2p
(o)
(
-
)
(+)
+
-
+
-
+
-
+
-
G = 1
+
-
+
-
G = 1
+
-
+
-
G = 1
13.4G
65K
65K
155K
1p
1p
1p
G = 59420
8p
(o)
(
-
)
(+)
FIGURE 5. RING AMPLIFIER 3-POLE MODEL
TIP
(o)
(+)
(
-
)
TIP
RING
-IN
VRX
VTX
R
R
1:1
20
20
R
4R
4R
4R
4R
R
8K
R
S
C
FB
R
VFB
R
RING
(o)
(
-
)
(+)
SENSE
(
-
)
(o)
(+)
TRANSMIT
(+)
(o)
(
-
)
FIGURE 6. AC LOOP MACROMODEL DIAGRAM
DC LOOP
T_OUT
T_SNS
RINGRX
TIPRX
Application Note 9824
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