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參數(shù)資料
| 型號： | RMWB33001 |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 衰減器 |
| 英文描述： | 33 GHz Buffer Amplifier MMIC |
| 中文描述： | 32000 MHz - 35000 MHz RF/MICROWAVE WIDE BAND LOW POWER AMPLIFIER |
| 封裝： | 3 X 1.20 MM, DIE |
| 文件頁數(shù)： | 2/6頁 |
| 文件大?。?/td> | 234K |
| 代理商： | RMWB33001 |
2004 Fairchild Semiconductor Corporation
RMWB33001 Rev. C
R
Electrical Characteristics
(At 25°C), 50
system, Vd = +4V, Quiescent Current Idq = 112mA
Note:
1:
Typical range of gate voltage is -0.5 to 0V to set Idq of 112mA.
Parameter
Min
32
Typ
Max
35
Units
GHz
V
dB
dB
dBm
mA
%
dB
dB
V
Frequency Range
Gate Supply Voltage
Gain Small Signal (Pin = -15dBm)
Gain Variation vs. Frequency
Power Output Saturated: (Pin = +1dBm)
Drain Current at Psat
Power Added Efficiency (PAE): at Psat
Input Return Loss (Pin = -15dBm)
Output Return Loss (Pin = -15dBm)
DC Detector Voltage at Pout = 18dBm
1
(Vg)
-0.2
24
2.0
19
120
15
12
12
1.0
20
17
Application Information
CAUTION: THIS IS AN ESD SENSITIVE DEVICE.
Chip carrier material should be selected to have GaAs
compatible thermal coefficient of expansion and high
thermal conductivity such as copper molybdenum or copper
tungsten. The chip carrier should be machined, finished flat,
plated with gold over nickel and should be capable of
withstanding 325°C for 15 minutes.
Die attachment should utilize Gold/Tin (80/20) eutectic alloy
solder and should avoid hydrogen environment for PHEMT
devices. Note that the backside of the chip is gold plated
and is used as RF and DC ground.
These GaAs devices should be handled with care and
stored in dry nitrogen environment to prevent contamination
of bonding surfaces. These are ESD sensitive devices and
should be handled with appropriate precaution including the
use of wrist grounding straps. All die attach and wire/ribbon
bond equipment must be well grounded to prevent static
discharges through the device.
Recommended wire bonding uses 3 mils wide and 0.5 mil
thick gold ribbon with lengths as short as practical allowing
for appropriate stress relief. The RF input and output bonds
should be typically 0.012" long corresponding to a typical 2
mil gap between the chip and the substrate material.
Figure 1. Functional Block Diagram
1
Note:
1:
Detector delivers >0.1V DC into 3k
load resistor for > +18dBm output power. If output power level detection is not desired, do not connect to detector bond pad.
Drain Supply
Vd1
Drain Supply
Vd2
MMIC Chip
RF IN
Gate Supply
Vg
Ground
(Back of Chip)
RF OUT
Output Power
Detector Voltage
Vdet
Drain Supply
Vd3
Drain Supply
Vd4
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