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參數(shù)資料
| 型號(hào)： | RMPA61810 |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 衰減器 |
| 英文描述： | Single Channel 6-18 GHz 1 Watt Power Amplifier MMIC |
| 中文描述： | 6000 MHz - 18000 MHz RF/MICROWAVE WIDE BAND MEDIUM POWER AMPLIFIER |
| 封裝： | 6.55 X 2.67 MM, 0.10 MM HEIGHT, DIE-6 |
| 文件頁數(shù)： | 2/6頁 |
| 文件大?。?/td> | 550K |
| 代理商： | RMPA61810 |
2004 Fairchild Semiconductor Corporation
RMPA61810 Rev. B
R
Application Information
CAUTION: THIS IS AN ESD SENSITIVE DEVICE
Chip carrier material should be selected to have GaAs
compatible thermal coefficient of expansion and high
thermal conductivity such as copper molybdenum or
copper tungsten. The chip carrier should be machined,
finished flat, plated with gold over nickel and should be
capable of withstanding 325°C for 15 minutes.
Die attachment for power devices should utilize Gold/Tin
(80/20) eutectic alloy solder and should avoid hydrogen
environment for PHEMT devices. Note that the backside of
the chip is gold plated and is used as RF and DC Ground.
These GaAs devices should be handled with care and
stored
in
dry
nitrogen
contamination of bonding surfaces. These are ESD
sensitive devices and should be handled with appropriate
precaution including the use of wrist-grounding straps. All
die attach and wire/ribbon bond equipment must be well
grounded to prevent static discharges through the device.
environment
to
prevent
Recommended wire bonding uses 3 mils wide and 0.5 mil
thick gold ribbon with lengths as short as practical allowing
for appropriate stress relief. The RF input and output bonds
should be typically 0.012" long corresponding to a typical 2
mil gap between the chip and the substrate material.
Figure 1. Functional Block Diagram
Figure 2. Chip Layout and Bond Pad Locations
(Chip size = 6.55mm x 2.67mm x 100μm. Back of Chip is RF and DC Ground)
Vg
Vg
Vd
Vd
RFIN
RF OUT
VG
0.0
105.3
5.8
13.2
48.1
59.5
94.4
5.8
13.2
48.1
59.5
94.4
101.8
101.8
VG
Dimension in mils
RMPA61810
8
8
2
2
2
2
2
3
0
2
RF
IN
VD
VD
RF
OUT
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