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參數(shù)資料
| 型號： | RK80532PC041512 |
| 英文描述： | Microprocessor |
| 中文描述： | 微處理器 |
| 文件頁數(shù)： | 22/86頁 |
| 文件大?。?/td> | 882K |
| 代理商： | RK80532PC041512 |
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22
Datasheet
Intel
Pentium
III Processor with 512KB L2 Cache at 1.13GHz to 1.40GHz
NOTES:
1. See
Section 7.0
for information on the these signals.
2. The BR0# pin is the only BREQ# signal that is bidirectional. See
Section 7.0
for more information.
3. This signal is 1.25V.
4. These signals are 1.5V.
5. This signal is 1.8V.
6. V
CC
is the power supply for the processor core and is described in
Section 2.6
.
VID[3:0,25mV] is described in
Section 2.6
.
V
TT
is used to terminate the system bus and generate V
REF
on the motherboard.
V
SS
is system ground.
BSEL[1:0] is described in
Section 2.8.2
and
Section 7.0
.
All other signals are described in
Section 7.0
.
7. This signal is used to control the value of the processor on-die termination resistance. Refer to the platform
design guide for the recommended pulldown resistor value.
8. These signals are 3.3V.
9. These signals are 2.0V.
10. 1.25V signal for Differential clock application and 2.5V for Single-ended clock application.
2.8.1
Asynchronous vs. Synchronous for System Bus Signals
All AGTL signals are synchronous to BCLK (BCLK/BCLK#). All of the CMOS, Clock, APIC,
and TAP signals can be applied asynchronously to BCLK (BCLK/BCLK#). All APIC signals are
synchronous to PICCLK. All TAP signals are synchronous to TCK.
Table 4.
System Bus Signal Groups
1
Group Name
Signals
AGTL Input
BPRI#, DEFER#, RESET#, RSP#
AGTL Output
PRDY#
AGTL I/O
A[35:3]#, ADS#, AERR#, AP[1:0]#, BERR#, BINIT#, BNR#, BP[3:2]#, BPM[1:0]#,
BR0#
2
, BR1#, D[63:0]#, DBSY#, DEP[7:0]#, DRDY#, HIT#, HITM#, LOCK#, REQ[4:0]#,
RP#, RS[2:0]#, TRDY#
CMOS Input
(1.25V)
3
VTT_PWRGD
CMOS Input
(1.5V)
4
A20M#, FLUSH#, IGNNE#, INIT#, LINT0/INTR, LINT1/NMI, PREQ#, SLP#, SMI#,
STPCLK#
CMOS Input
(1.8V)
5
PWRGOOD
CMOS Output
(1.5V)
4
CMOS Output
8
(3.3V)
FERR#, IERR#, THERMTRIP#
VID[3:0,25mV], BSEL[1:0]
System Bus
Clock
10
(1.25V/2.5V)
APIC Clock
9
APIC I/O
4
TAP Input
4
TAP Output
4
BCLK0, BCLK0#
PICCLK
PICD[1:0]
TCK, TDI, TMS, TRST#
TDO
CPUPRES#, DYN_OE, NCHTRL, PLL[2:1], SLEWCTRL, RTTCTRL
7
,THERMDN,
THERMDP, V
CC
CORE
, V
REF
, V
SS
, V
TT
, Reserved,
Power/Other
6
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