參數(shù)資料
型號(hào): RG82845MZ
英文描述: Controller Miscellaneous - Datasheet Reference
中文描述: 控制器雜項(xiàng)-數(shù)據(jù)表參考
文件頁數(shù): 76/157頁
文件大?。?/td> 1407K
代理商: RG82845MZ
Intel
82845MP/82845MZ Chipset-Mobile (MCH-M)
250687-002
Datasheet
25
R
2.4.2.
AGP Flow Control Signals
Table 8. AGP Flow Control Signal Descriptions
Signal Name
Type
Description
RBF#
I
AGP
Read Buffer Full: Indicates if the master is ready to accept previously requested
low priority read data. When RBF# is asserted, the MCH-M is not allowed to initiate
the return of low priority read data. That is, the MCH-M can only finish returning the
data for the request currently being serviced. RBF# is only sampled at the
beginning of a cycle.
If the AGP master is always ready to accept return read data then it is not required
to implement this signal.
During FRAME# Operation: This signal is not used during AGP FRAME#
operation.
WBF#
I
AGP
Write-Buffer Full: indicates if the master is ready to accept Fast Write data from
the MCH-M. When WBF# is asserted the MCH-M is not allowed to drive Fast Write
data to the AGP master. WBF# is only sampled at the beginning of a cycle.
If the AGP master is always ready to accept fast write data then it is not required to
implement this signal.
During FRAME# Operation: This signal is not used during AGP FRAME#
operation.
2.4.3.
AGP Status Signals
Table 9. AGP Status Signal Descriptions
Signal Name
Type
Description
ST[2:0]
O
AGP
Status: Provides information from the arbiter to an AGP Master on what it may do.
ST[2:0] only have meaning to the master when its GNT# is asserted. When GNT#
is deasserted these signals have no meaning and must be ignored. Refer to the
AGP Interface Specification revision 2.0 for further explanation of the ST[2:0]
values and their meanings.
During FRAME# Operation: These signals are not used during FRAME# based
operation; except that a ‘111’ indicates that the master may begin a FRAME#
transaction.
相關(guān)PDF資料
PDF描述
RG82870P2 Controller Miscellaneous - Datasheet Reference
RH5RE36AA-T1-FA 3.6 V FIXED POSITIVE LDO REGULATOR, 0.7 V DROPOUT, PSSO3
RH5RE56AA-T1-FA 5.6 V FIXED POSITIVE LDO REGULATOR, 0.7 V DROPOUT, PSSO3
RE5RE36AA-TZ-FC 3.6 V FIXED POSITIVE LDO REGULATOR, 0.7 V DROPOUT, PBCY3
RE5RE36AC-TZ-FC 3.6 V FIXED POSITIVE LDO REGULATOR, 0.7 V DROPOUT, PBCY3
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
RG82845PE S L6H5 制造商:Intel 功能描述:CHIPSTGMCH 82845PE HT-PBGA760
RG82845PESL6Q3 制造商:Intel 功能描述:Chipsets
RG82845-SL5V7 制造商:Intel 功能描述:INTEL 845G GRAPHICS AND MEMORY CONTROLLER HUB(GMCH)
RG82845SL5YQ 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel?? 845 Chipset: 82845 Memory Controller Hub (MCH) for SDR
RG82845-SL63W 制造商:Intel 功能描述:INTEL 845G GRAPHICS AND MEMORY CONTROLLER HUB(GMCH)