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Page ix of liv
Contents
Section 1 Overview................................................................................................1
1.1
SH7268/7269 Features.......................................................................................................... 1
1.2
Product Lineup.................................................................................................................... 16
1.3
Block Diagram.................................................................................................................... 17
1.4
Pin Assignment ................................................................................................................... 18
1.5
Pin Functions ...................................................................................................................... 21
1.6
List of Pins.......................................................................................................................... 34
Section 2 CPU......................................................................................................57
2.1
Register Configuration........................................................................................................ 57
2.1.1
General Registers ................................................................................................ 57
2.1.2
Control Registers ................................................................................................ 58
2.1.3
System Registers................................................................................................. 60
2.1.4
Register Banks .................................................................................................... 61
2.1.5
Initial Values of Registers................................................................................... 61
2.2
Data Formats....................................................................................................................... 62
2.2.1
Data Format in Registers .................................................................................... 62
2.2.2
Data Formats in Memory .................................................................................... 62
2.2.3
Immediate Data Format ...................................................................................... 63
2.3
Instruction Features............................................................................................................. 64
2.3.1
RISC-Type Instruction Set.................................................................................. 64
2.3.2
Addressing Modes .............................................................................................. 68
2.3.3
Instruction Format............................................................................................... 73
2.4
Instruction Set ..................................................................................................................... 77
2.4.1
Instruction Set by Classification ......................................................................... 77
2.4.2
Data Transfer Instructions................................................................................... 83
2.4.3
Arithmetic Operation Instructions ...................................................................... 87
2.4.4
Logic Operation Instructions .............................................................................. 90
2.4.5
Shift Instructions................................................................................................. 91
2.4.6
Branch Instructions ............................................................................................. 92
2.4.7
System Control Instructions................................................................................ 93
2.4.8
Floating-Point Operation Instructions................................................................. 95
2.4.9
FPU-Related CPU Instructions ........................................................................... 97
2.4.10
Bit Manipulation Instructions ............................................................................. 98
2.5
Processing States................................................................................................................. 99