
8. Voltage Detection Circuit (LVD)
8.
Voltage Detection Circuit (LVD)
The voltage detection circuit (LVD) monitors the voltage level input to the VCC pin using a program.
8.1
Overview
In voltage detection 0, the detection voltage can be selected from four levels by using the option function select register 1
(OFS1).
In voltage detection 1 and voltage detection 2, the detection voltage can be selected from sixteen levels using the voltage
detection level select register (LVDLVLR).
Voltage detection 2 can be switched between input voltages to VCC pin and CMPA2.
Reset of voltage monitoring 0, reset/interrupt of voltage monitoring 1, and reset/interrupt of voltage monitoring 2 can be
used.
However, the voltage detection circuit is shared by voltage monitoring 1 and voltage monitoring 2 and the comparators
A1 and A2. It can be selected however whether the voltage detection circuit will be used by the voltage monitoring 1 and
voltage monitoring 2 or the comparators A1 and A2.
Table 8.1 lists the specifications of the voltage detection circuit.
Figure 8.1 is a block diagram of the voltage detection
circuit.
Figure 8.2 is a block diagram of the voltage monitoring 1 interrupt/reset circuit.
Figure 8.3 is a block diagram of
the voltage monitoring 2 interrupt/reset circuit.
Table 8.1
Voltage Detection Circuit Specifications
Item
Voltage Monitoring 0
Voltage Monitoring 1
Voltage Monitoring 2
VCC
monitoring
Monitored
voltage
Vdet0
Vdet1
Vdet2
Detected
event
Voltage drops past Vdet0
Voltage rises or drops past Vdet1
Voltage rises or drops past Vdet2
Input voltages to VCC pin and
CMPA2 pin can be switched using
the LVCMPCR.EXVCCINP2 bit
Detection
voltage
Voltage selectable from four
levels using OFS1
Voltage selectable from sixteen
levels using
LVDLVLR.LVD1LVLR[3:0] bits
Varies according to whether VCC
or CMPA2 is selected.
Voltage selectable from sixteen
levels using
LVDLVLR.LVD2VLR[3:0] bits
Monitoring
flag
None
LVD1SR.LVD1MON flag: Monitors
whether voltage is higher or lower
than Vdet1
LVD2SR.LVD2MON flag: Monitors
whether voltage is higher or lower
than Vdet2
LVD1SR.LVD1DET flag: Vdet1
passage detection
LVD2SR.LVD2DET flag: Vdet2
passage detection
Process upon
voltage
detection
Reset
Voltage monitoring 0 reset
Voltage monitoring 1 reset
Voltage monitoring 2 reset
Reset when Vdet0 > VCC
CPU restart after specified
time with VCC > Vdet0
Reset when Vdet1 > VCC
CPU restart timing selectable:
after specified time with VCC >
Vdet1 or Vdet1 > VCC
Reset when Vdet2 > VCC
CPU restart timing selectable:
after specified time with VCC >
Vdet2 or Vdet2 > VCC
Interrupt
No interrupt
Voltage monitoring 1 interrupt
Voltage monitoring 2 interrupt
Non-maskable or maskable
interrupt is selectable
Non-maskable or maskable
interrupt is selectable
Interrupt request issued when
Vdet1 > VCC and VCC > Vdet1 or
either
Interrupt request issued when
Vdet2 > VCC and VCC > Vdet2 or
either
Digital filter
Enable/
Disable
switching
Digital filter function not
available
Available
Sampling
time
—
1/n LOCO frequency
2
(n: 1, 2, 4, 8)
1/n LOCO frequency
2
(n: 1, 2, 4, 8)