參數(shù)資料
型號(hào)： R5F36S16DFB
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 32.72 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 0.50 MM PITCH, PLASTIC, HTQFP-100
文件頁數(shù)： 12/55頁
文件大?。?/td> 748K
代理商： R5F36S16DFB
M16C/6S1 Group
1. Overview
Under development Preliminary document
Specifications in this document are tentative and subject to change.
R01DS0054EJ0050 Rev.0.50
Page 2 of 52
Jun 14, 2011
1.2
Specifications
Tables 1.1 to 1.4 outline the Specifications.
Table 1.1
Specifications (1/2)
Item
Function
Description
CPU
Central processing unit M16C/60 Series core
(multiplier: 16-bit × 16-bit
! 32-bit,
multiply and accumulate instruction: 16-bit × 16-bit + 32-bit
! 32-bit)
Number of basic instructions: 91
Minimum instruction execution time:
32.6 ns (f(BCLK) = 30.72 MHz, VCC1 = VCC2 = 3.0 to 3.6 V)
41.7 ns (f(BCLK) = 24 MHz, VCC1 = VCC2 = 2.7 to 3.0 V)
Memory
ROM, RAM, data flash
Clock
Clock generator
4 circuits:
Main clock, sub clock, low-speed on-chip oscillator (125 kHz),
PLL frequency synthesizer
Oscillation stop detection:
Main clock oscillation stop/reoscillation detection function
Frequency divider circuit: Divide ratio selectable from 1, 2, 4, 8, and 16
Power saving features: Wait mode, stop mode
Real-time clock
I/O Ports
Programmable I/O
ports
CMOS I/O ports: 53 (selectable pull-up resistors)
N-channel open drain ports: 3
Interrupts
Interrupt vectors: 70
External interrupt inputs: 14 (NMI, INT × 5, key input × 8)
Interrupt priority levels: 7
Watchdog Timer
15-bit timer × 1 (with prescaler)
Automatic reset start function selectable
DMA
DMAC
4 channels, cycle steal mode
Trigger sources: 43
Transfer modes: 2 (single transfer, repeat transfer)
Timers
Timer A
16-bit timer × 5
Timer mode, event counter mode, one-shot timer mode, pulse width
modulation (PWM) mode,
Event counter two-phase pulse signal processing (two-phase encoder input) × 3,
programmable output mode × 3
Timer B
16-bit timer × 6
Timer mode, event counter mode, pulse period measurement mode, pulse
width measurement mode
Real-time clock
Count: seconds, minutes, hours, days of the week, months, years
Serial
Interface
UART0 to UART2,
UART5 to UART7
Clock synchronous/asynchronous × 5 channels, PLC connection × 1 channel,
I2C-bus, IEBus, special mode 2, SIM (UART2)
SI/O3, SI/O4
Clock synchronization only × 2 channels
Multi-master I2C-bus Interface
1 channel
A/D Converter
10-bit resolution × 18 channels, including sample and hold function
Conversion time: 2.8
s
CRC Calculator
CRC-CCITT (X16 + X12 + X5 + 1), CRC-16 (X16 + X15 + X2 + 1) compliant
Encryption
AES
AES Encryption (Key length: 128 bits)
Flash Memory
Erase/write power supply voltage: 2.7 V to 3.6 V
Erase/write cycles:
1,000 times (program ROM 1, program ROM 2),
10,000 times (data flash)
Program security: ROM code protect, ID code check
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