參數(shù)資料
型號(hào)： R5F3650KNFA
元件分類(lèi)： 微控制器/微處理器
英文描述： MICROCONTROLLER, PQFP100
封裝： 20 X 14 MM, 0.65 MM PITCH, QFP-100
文件頁(yè)數(shù)： 42/81頁(yè)
文件大小： 879K
代理商： R5F3650KNFA
60
4317K–AVR–03/2013
AT90PWM2/3/2B/3B
;
.org 0xC00
0xC00
RESET: ldi
r16,high(RAMEND); Main program start
0xC01
out
SPH,r16
; Set Stack Pointer to top of RAM
0xC02
ldi
r16,low(RAMEND)
0xC03
out
SPL,r16
0xC04
sei
; Enable interrupts
0xC05
<instr>
xxx
When the BOOTRST Fuse is programmed, the Boot section size set to 2K bytes and the IVSEL
bit in the MCUCR Register is set before any interrupts are enabled, the most typical and general
program setup for the Reset and Interrupt Vector Addresses in AT90PWM2/2B/3/3B is:
Address
Labels Code
Comments
;
.org 0xC00
0xC00
rjmp
RESET
; Reset handler
0xC01
rjmp
PSC2_CAPT
; PSC2 Capture event Handler
0xC02
rjmp
PSC2_EC
; PSC2 End Cycle Handler
...
;
0xC1F
rjmp
SPM_RDY
; Store Program Memory Ready Handler
;
0xC20
RESET: ldi
r16,high(RAMEND); Main program start
0xC21
out
SPH,r16
; Set Stack Pointer to top of RAM
0xC22
ldi
r16,low(RAMEND)
0xC23
out
SPL,r16
0xC24
sei
; Enable interrupts
0xC25
<instr>
xxx
10.1.1
Moving Interrupts Between Application and Boot Space
The MCU Control Register controls the placement of the Interrupt Vector table.
10.1.2
MCU Control Register – MCUCR
Bit 1 – IVSEL: Interrupt Vector Select
When the IVSEL bit is cleared (zero), the Interrupt Vectors are placed at the start of the Flash
memory. When this bit is set (one), the Interrupt Vectors are moved to the beginning of the Boot
Loader section of the Flash. The actual address of the start of the Boot Flash Section is deter-
mined by the BOOTSZ Fuses. Refer to the section “Boot Loader Support – Read-While-Write
Self-Programming” on page 265 for details. To avoid unintentional changes of Interrupt Vector
tables, a special write procedure must be followed to change the IVSEL bit:
1.
Write the Interrupt Vector Change Enable (IVCE) bit to one.
2.
Within four cycles, write the desired value to IVSEL while writing a zero to IVCE.
Bit
7
6543
210
SPIPS
–
PUD
–
IVSEL
IVCE
MCUCR
Read/Write
R/W
R
R/W
R
R/W
Initial Value
0
0000
000
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