參數(shù)資料
型號: R5F2L3A7CNFA
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP100
封裝: 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100
文件頁數(shù): 61/74頁
文件大?。?/td> 959K
代理商: R5F2L3A7CNFA
65
2588F–AVR–06/2013
ATtiny261/461/861
Table 10-4 and Table 10-5 relate the alternate functions of Port A to the overriding signals
Table 10-4.
Overriding Signals for Alternate Functions in PA7:PA4
Signal
Name
PA7/ADC6/AIN0/
PCINT7
PA6/ADC5/AIN1/
PCINT6
PA5/ADC4/AIN2/
PCINT5
PA4/ADC3/ICP0/
PCINT4
PUOE
0000
PUOV
0000
DDOE
0000
DDOV
0000
PVOE
0000
PVOV
0000
PTOE
0000
DIEOE
PCINT7 PCIE +
ADC6D
PCINT6 PCIE +
ADC5D
PCINT5 PCIE +
ADC4D
PCINT4 PCIE +
ADC3D
DIEOV
ADC6D
ADC5D
ADC4D
ADC3D
DI
PCINT7
PCINT6
PCINT5
ICP0/PCINT4
AIO
ADC6, AIN0
ADC5, AIN1
ADC4, AIN2
ADC3
Table 10-5.
Overriding Signals for Alternate Functions in PA3:PA0
Signal
Name
PA3/AREF/
PCINT3
PA2/ADC2/INT1/
USCK/SCL/PCINT2
PA1/ADC1/DO/
PCINT1
PA0/ADC0/DI/SDA/
PCINT0
PUOE
0
PUOV
0
DDOE
0
USI_TWO_WIRE
USIPOS
0
USI_TWO_WIRE
USIPOS
DDOV
0
(USI_SCL_HOLD +
PORTB2) DDB2
USIPOS
0
(SDA + PORTB0)
DDRB0 USIPOS
PVOE
0
USI_TWO_WIRE
DDRB2
USI_THREE_WI
RE USIPOS
USI_TWO_WIRE
DDRB0 USIPOS
PVOV
0
DO USIPOS
0
PTOE
0
USI_PTOE USIPOS
0
DIEOE
PCINT3
PCIE
PCINT2 PCIE + INT1 +
ADC2D + USISIE
USIPOS
PCINT1 PCIE +
ADC1D
PCINT0 PCIE +
ADC0D + USISIE
USIPOS
DIEOV
0
ADC2D
ADC1D
ADC0D
DI
PCINT3
USCK/SCL/INT1/ PCINT2
PCINT1
DI/SDA/PCINT0
AIO
AREF
ADC2
ADC1
ADC0
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