參數(shù)資料
型號(hào): R5F2L36ACDFP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP64
封裝: 10 X 10 MM, 0.50 MM PITCH, PLASTIC, LQFP-64
文件頁(yè)數(shù): 37/74頁(yè)
文件大?。?/td> 959K
代理商: R5F2L36ACDFP
43
2588F–AVR–06/2013
ATtiny261/461/861
8.1.2
External Reset
An External Reset is generated by a low level on the RESET pin if enabled. Reset pulses longer
than the minimum pulse width (see “System and Reset Characteristics” on page 190) will gener-
ate a reset, even if the clock is not running. Shorter pulses are not guaranteed to generate a
reset. When the applied signal reaches the Reset Threshold Voltage – V
RST – on its positive
edge, the delay counter starts the MCU after the Time-out period – t
TOUT – has expired.
Figure 8-4.
External Reset During Operation
8.1.3
Brown-out Detection
ATtiny261/461/861 has an On-chip Brown-out Detection (BOD) circuit for monitoring the V
CC
level during operation by comparing it to a fixed trigger level. The trigger level for the BOD can
be selected by the BODLEVEL Fuses. The trigger level has a hysteresis to ensure spike free
Brown-out Detection. The hysteresis on the detection level should be interpreted as V
BOT+ =
V
BOT + VHYST/2 and VBOT- = VBOT - VHYST/2.
When the BOD is enabled, and V
CC decreases to a value below the trigger level (VBOT- in Figure
8-5), the Brown-out Reset is immediately activated. When V
CC increases above the trigger level
(V
BOT+ in Figure 8-5), the delay counter starts the MCU after the Time-out period tTOUT has
expired.
The BOD circuit will only detect a drop in V
CC if the voltage stays below the trigger level for lon-
ger than t
Figure 8-5.
Brown-out Reset During Operation
CC
VCC
RESET
TIME-OUT
INTERNAL
RESET
VBOT-
VBOT+
tTOUT
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