- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄69306 > R5F212BASNFA 16-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PQFP48 PDF資料下載
參數(shù)資料
| 型號： | R5F212BASNFA |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PQFP48 |
| 封裝： | 14 X 14 MM, 0.80 MM PITCH, PLASTIC, LQFP-48 |
| 文件頁數(shù)： | 62/138頁 |
| 文件大?。?/td> | 492K |
| 代理商： | R5F212BASNFA |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁當(dāng)前第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁
241
4317K–AVR–03/2013
AT90PWM2/3/2B/3B
If differential channels are used, the selected reference should not be closer to AV
CC than indi-
cated in Table 26-5 on page 307.
21.6
ADC Noise Canceler
The ADC features a noise canceler that enables conversion during sleep mode to reduce noise
induced from the CPU core and other I/O peripherals. The noise canceler can be used with ADC
Noise Reduction and Idle mode. To make use of this feature, the following procedure should be
used:
a.
Make sure that the ADATE bit is reset.
b.
Make sure that the ADC is enabled and is not busy converting. Single Conversion
mode must be selected and the ADC conversion complete interrupt must be
enabled.
c.
Enter ADC Noise Reduction mode (or Idle mode). The ADC will start a conversion
once the CPU has been halted.
d.
If no other interrupts occur before the ADC conversion completes, the ADC inter-
rupt will wake up the CPU and execute the ADC Conversion Complete interrupt
routine. If another interrupt wakes up the CPU before the ADC conversion is com-
plete, that interrupt will be executed, and an ADC Conversion Complete interrupt
request will be generated when the ADC conversion completes. The CPU will
remain in active mode until a new sleep command is executed.
Note that the ADC will not be automatically turned off when entering other sleep modes than Idle
mode and ADC Noise Reduction mode. The user is advised to write zero to ADEN before enter-
ing such sleep modes to avoid excessive power consumption.
If the ADC is enabled in such sleep modes and the user wants to perform differential conver-
sions, the user is advised to switch the ADC off and on after waking up from sleep to prompt an
extended conversion to get a valid result.
21.6.1
Analog Input Circuitry
The analog input circuitry for single ended channels is illustrated in Figure 21-8. An analog
source applied to ADCn is subjected to the pin capacitance and input leakage of that pin, regard-
less of whether that channel is selected as input for the ADC. When the channel is selected, the
source must drive the S/H capacitor through the series resistance (combined resistance in the
input path).
The ADC is optimized for analog signals with an output impedance of approximately 10 k
or
less. If such a source is used, the sampling time will be negligible. If a source with higher imped-
ance is used, the sampling time will depend on how long time the source needs to charge the
S/H capacitor, with can vary widely. The user is recommended to only use low impedant sources
with slowly varying signals, since this minimizes the required charge transfer to the S/H
capacitor.
If differential gain channels are used, the input circuitry looks somewhat different, although
source impedances of a few hundred k
or less is recommended.
Signal components higher than the Nyquist frequency (f
ADC/2) should not be present for either
kind of channels, to avoid distortion from unpredictable signal convolution. The user is advised
to remove high frequency components with a low-pass filter before applying the signals as
inputs to the ADC.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| R5F212ACSDFP | 16-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PQFP48 |
| R5F212BCSNFP | 16-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PQFP48 |
| R5F212BASNFP | 16-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PQFP48 |
| R5F212ACSNFP | 16-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PQFP48 |
| R5F212BASNLG | 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PBGA64 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| R5F212BASNFA#U0 | 制造商:Renesas Electronics Corporation 功能描述:IC MCU 16BIT 96KB FLASH 64LQFP 制造商:Renesas Electronics Corporation 功能描述:R8C Series 16 bit 7 kB RAM 96 kB Flash Single Chip Microcontroller SMT -LQFP-64 |
| R5F212BASNFA#V0 | 功能描述:IC MCU 16/32BIT 96KB FLSH 64LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:R8C/2x/2B 標(biāo)準(zhǔn)包裝:250 系列:80C 核心處理器:8051 芯體尺寸:8-位 速度:16MHz 連通性:EBI/EMI，I²C，UART/USART 外圍設(shè)備:POR，PWM，WDT 輸入/輸出數(shù):40 程序存儲器容量:- 程序存儲器類型:ROMless EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4.5 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:68-LCC（J 形引線） 包裝:帶卷 (TR) |
| R5F212BASNFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:RENESAS MCU |
| R5F212BASNFP#U0 | 制造商:Renesas Electronics Corporation 功能描述:MCU 16-Bit R8C CISC 96KB Flash 2.5V/3.3V/5V 64-Pin LQFP 制造商:Renesas Electronics Corporation 功能描述:MCU 16BIT R8C CISC 96KB FLASH 2.5V/3.3V/5V 64LQFP - Trays 制造商:Renesas Electronics Corporation 功能描述:MCU R8C/2B 制造商:Renesas Electronics 功能描述:MCU 16-Bit R8C CISC 96KB Flash 2.5V/3.3V/5V 64-Pin LQFP 制造商:Renesas 功能描述:MCU 16-Bit R8C CISC 96KB Flash 2.5V/3.3V/5V 64-Pin LQFP |
| R5F212BASNFP#V0 | 功能描述:IC R8C/2B MCU FLASH 64LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:R8C/2x/2B 標(biāo)準(zhǔn)包裝:250 系列:56F8xxx 核心處理器:56800E 芯體尺寸:16-位 速度:60MHz 連通性:CAN，SCI，SPI 外圍設(shè)備:POR，PWM，溫度傳感器，WDT 輸入/輸出數(shù):21 程序存儲器容量:40KB（20K x 16） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:6K x 16 電壓 - 電源 (Vcc/Vdd):2.25 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 6x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:48-LQFP 包裝:托盤 配用:MC56F8323EVME-ND - BOARD EVALUATION MC56F8323 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。